cache: l2x0: Fix missing write to Auxiliary Control Register
authorLey Foon Tan <ley.foon.tan@intel.com>
Mon, 4 May 2020 10:41:55 +0000 (18:41 +0800)
committerTom Rini <trini@konsulko.com>
Wed, 6 May 2020 19:12:48 +0000 (15:12 -0400)
In commit f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override
bit") we removed writel to regs->pl310_aux_ctrl by accident.  This
commit restores it back.

Fixes: f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override bit")
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
drivers/cache/cache-l2x0.c

index 226824c2832eda7e632c2a057cc9343b9c1f6a52..a1556fbf1740f165901f33396794d7d8ff7960e2 100644 (file)
@@ -36,6 +36,8 @@ static void l2c310_of_parse_and_init(struct udevice *dev)
        if (dev_read_bool(dev, "arm,shared-override"))
                saved_reg |= L310_SHARED_ATT_OVERRIDE_ENABLE;
 
+       writel(saved_reg, &regs->pl310_aux_ctrl);
+
        saved_reg = readl(&regs->pl310_tag_latency_ctrl);
        if (!dev_read_u32_array(dev, "arm,tag-latency", tag, 3))
                saved_reg |= L310_LATENCY_CTRL_RD(tag[0] - 1) |