cache: l2x0: Fix missing write to Auxiliary Control Register
authorLey Foon Tan <ley.foon.tan@intel.com>
Mon, 4 May 2020 10:41:55 +0000 (18:41 +0800)
committerTom Rini <trini@konsulko.com>
Wed, 6 May 2020 19:12:48 +0000 (15:12 -0400)
commit653f7c44677cd13bb106673bb7c46542e217fa13
tree9acf4fc82e747b1788bec31a07e6568e734a2f79
parent15c160301cf4761d45e09808f9d818525425901b
cache: l2x0: Fix missing write to Auxiliary Control Register

In commit f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override
bit") we removed writel to regs->pl310_aux_ctrl by accident.  This
commit restores it back.

Fixes: f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override bit")
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
drivers/cache/cache-l2x0.c