remove fenv saving/loading code from setjmp/longjmp on arm

the issue is identical to the recent commit fixing the mips versions:
despite other implementations doing this, it conflicts with the
requirements of ISO C and it's a waste of time and code size.

diff --git a/src/setjmp/arm/longjmp.s b/src/setjmp/arm/longjmp.s
index 84ddc22fc5b80ae09a6ae4dc82e1e6e5bcb6e970..aff15fbd263aba17412d4f6936899cdf45306384 100644 (file)
--- a/src/setjmp/arm/longjmp.s
+++ b/src/setjmp/arm/longjmp.s
@@ -21,8 +21,6 @@ longjmp:
 2:     tst r1,#0x40
        beq 2f
        ldc p11, cr8, [ip], #64
-       ldmia ip!, {r2,r3}
-       mcr p10, 7, r3, cr1, cr0, 0
 2:     tst r1,#0x200
        beq 3f
        ldcl p1, cr10, [ip], #8

diff --git a/src/setjmp/arm/setjmp.s b/src/setjmp/arm/setjmp.s
index 904ff1027da28f1a978a891432571eedf41e5a0f..b74dfc682c017bac06bfd68225d62ba7256b2ddc 100644 (file)
--- a/src/setjmp/arm/setjmp.s
+++ b/src/setjmp/arm/setjmp.s
@@ -23,8 +23,6 @@ setjmp:
 2:     tst r1,#0x40
        beq 2f
        stc p11, cr8, [ip], #64
-       mrc p10, 7, r2, cr1, cr0, 0
-       stmia ip!, {r0,r2}
 2:     tst r1,#0x200
        beq 3f
        stcl p1, cr10, [ip], #8