resource = SC_R_SDHC_1;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_SDHC2_IPG_CLK:
+ case IMX8QM_SDHC2_CLK:
+ case IMX8QM_SDHC2_DIV:
+ resource = SC_R_SDHC_2;
+ pm_clk = SC_PM_CLK_PER;
+ break;
case IMX8QM_UART0_IPG_CLK:
case IMX8QM_UART0_CLK:
resource = SC_R_UART_0;
resource = SC_R_SDHC_1;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_SDHC2_IPG_CLK:
+ case IMX8QM_SDHC2_CLK:
+ case IMX8QM_SDHC2_DIV:
+ resource = SC_R_SDHC_2;
+ pm_clk = SC_PM_CLK_PER;
+ break;
case IMX8QM_ENET0_IPG_CLK:
case IMX8QM_ENET0_AHB_CLK:
case IMX8QM_ENET0_REF_DIV:
resource = SC_R_SDHC_1;
pm_clk = SC_PM_CLK_PER;
break;
+ case IMX8QM_SDHC2_IPG_CLK:
+ case IMX8QM_SDHC2_CLK:
+ case IMX8QM_SDHC2_DIV:
+ resource = SC_R_SDHC_2;
+ pm_clk = SC_PM_CLK_PER;
+ break;
case IMX8QM_ENET0_IPG_CLK:
case IMX8QM_ENET0_AHB_CLK:
case IMX8QM_ENET0_REF_DIV: