add a_clz_64 helper function

counts leading zero bits of a 64bit int, undefined on zero input.
(has nothing to do with atomics, added to atomic.h so target specific
helper functions are together.)

there is a logarithmic generic implementation and another in terms of
a 32bit a_clz_32 on targets where that's available.

diff --git a/arch/aarch64/atomic_arch.h b/arch/aarch64/atomic_arch.h
index 8ab68c1cc214f60293d274b39ebd05320946d19e..40fefc25bb17d4ce62a9bc2637cb9c1f8f064322 100644 (file)
--- a/arch/aarch64/atomic_arch.h
+++ b/arch/aarch64/atomic_arch.h
@@ -73,3 +73,10 @@ static inline int a_ctz_64(uint64_t x)
                : "=r"(x) : "r"(x));
        return x;
 }
+
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+       __asm__("clz %0, %1" : "=r"(x) : "r"(x));
+       return x;
+}

diff --git a/arch/arm/atomic_arch.h b/arch/arm/atomic_arch.h
index d6af84d084513141344c8da3578d0d6f1087969c..a121010f4a208b28a7ce27aec9242e433094add3 100644 (file)
--- a/arch/arm/atomic_arch.h
+++ b/arch/arm/atomic_arch.h
@@ -81,3 +81,10 @@ static inline void a_crash()
 #endif
                : : : "memory");
 }
+
+#define a_clz_32 a_clz_32
+static inline int a_clz_32(uint32_t x)
+{
+       __asm__ ("clz %0, %1" : "=r"(x) : "r"(x));
+       return x;
+}

diff --git a/arch/i386/atomic_arch.h b/arch/i386/atomic_arch.h
index 2b1a0490b4add8c61490f00339cd6a96e76cf1d3..7d2a48a57024a8ef65d94de6337dc54e30f87083 100644 (file)
--- a/arch/i386/atomic_arch.h
+++ b/arch/i386/atomic_arch.h
@@ -99,3 +99,10 @@ static inline int a_ctz_l(unsigned long x)
        __asm__( "bsf %1,%0" : "=r"(r) : "r"(x) );
        return r;
 }
+
+#define a_clz_32 a_clz_32
+static inline int a_clz_32(uint32_t x)
+{
+       __asm__( "bsr %1,%0 ; xor $31,%0" : "=r"(x) : "r"(x) );
+       return x;
+}

diff --git a/arch/powerpc/atomic_arch.h b/arch/powerpc/atomic_arch.h
index f31566b20956f7751db74e24250a33b566341928..5b65cde7dccd4e320c2bec4edcdb26b03de646f5 100644 (file)
--- a/arch/powerpc/atomic_arch.h
+++ b/arch/powerpc/atomic_arch.h
@@ -37,3 +37,10 @@ static inline void a_store(volatile int *p, int v)
        *p = v;
        a_post_llsc();
 }
+
+#define a_clz_32 a_clz_32
+static inline int a_clz_32(uint32_t x)
+{
+       __asm__ ("cntlzw %0, %1" : "=r"(x) : "r"(x));
+       return x;
+}

diff --git a/arch/powerpc64/atomic_arch.h b/arch/powerpc64/atomic_arch.h
index 269d79c6ed22ec54cdfa94709c660b9ea70821bf..17cababdc977940f43995aadc33cc3546cbc6fd3 100644 (file)
--- a/arch/powerpc64/atomic_arch.h
+++ b/arch/powerpc64/atomic_arch.h
@@ -61,3 +61,10 @@ static inline void a_crash()
 {
        __asm__ __volatile__ (".long 0");
 }
+
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+       __asm__ ("cntlzd %0, %1" : "=r"(x) : "r"(x));
+       return x;
+}

diff --git a/arch/x32/atomic_arch.h b/arch/x32/atomic_arch.h
index 7daf4ae241efeb1eade8dd3f577774c6f44bf895..a744c299fbb5949bc072b376ccf077809eb79cb2 100644 (file)
--- a/arch/x32/atomic_arch.h
+++ b/arch/x32/atomic_arch.h
@@ -112,3 +112,10 @@ static inline int a_ctz_l(unsigned long x)
        __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
        return x;
 }
+
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+       __asm__( "bsr %1,%0 ; xor $63,%0" : "=r"(x) : "r"(x) );
+       return x;
+}

diff --git a/arch/x86_64/atomic_arch.h b/arch/x86_64/atomic_arch.h
index 55fc6fb9816da89366622f438cb6f0b639393287..da4e203754804de83c0ba3c29f3ad52870b398e5 100644 (file)
--- a/arch/x86_64/atomic_arch.h
+++ b/arch/x86_64/atomic_arch.h
@@ -114,3 +114,10 @@ static inline int a_ctz_64(uint64_t x)
        __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
        return x;
 }
+
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+       __asm__( "bsr %1,%0 ; xor $63,%0" : "=r"(x) : "r"(x) );
+       return x;
+}

diff --git a/src/internal/atomic.h b/src/internal/atomic.h
index 6f37d252cfec3938da5ebd914c355019f0bff240..ab473dd75e79a3dd5e26817d03aa8b56b2bdfa77 100644 (file)
--- a/src/internal/atomic.h
+++ b/src/internal/atomic.h
@@ -277,6 +277,27 @@ static inline int a_ctz_64(uint64_t x)
 }
 #endif
 
+#ifndef a_clz_64
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+#ifdef a_clz_32
+       if (x>>32)
+               return a_clz_32(x>>32);
+       return a_clz_32(x) + 32;
+#else
+       uint32_t y;
+       int r;
+       if (x>>32) y=x>>32, r=0; else y=x, r=32;
+       if (y>>16) y>>=16; else r |= 16;
+       if (y>>8) y>>=8; else r |= 8;
+       if (y>>4) y>>=4; else r |= 4;
+       if (y>>2) y>>=2; else r |= 2;
+       return r | !(y>>1);
+#endif
+}
+#endif
+
 #ifndef a_ctz_l
 #define a_ctz_l a_ctz_l
 static inline int a_ctz_l(unsigned long x)