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(parent: 806655b) | patch
fix missing barrier instructions in mips atomic asm
authorRich Felker <dalias@aerifal.cx>
Sat, 19 Jul 2014 19:51:12 +0000 (15:51 -0400)
committerRich Felker <dalias@aerifal.cx>
Mon, 28 Jul 2014 04:28:00 +0000 (00:28 -0400)
commite30a16314d08667aa3302e2df5baaa23b80a3aa2
tree019e8f79283d3ee8c142316e2c4cb6526bc68de1tree | snapshot
parent806655b22539416290aeff36c4be588ce3c0e9a1commit | diff
fix missing barrier instructions in mips atomic asm

previously I had wrongly assumed the ll/sc instructions also provided
memory synchronization; apparently they do not. this commit adds sync
instructions before and after each atomic operation and changes the
atomic store to simply use sync before and after a plain store, rather
than a useless compare-and-swap.

(cherry picked from commit bcad48439494820989f5867c3f8ccfa6aae2909f)
arch/mips/atomic.h diff | blob | history
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