+// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx CSE QSPI board DTS
*
* Copyright (C) 2015 - 2017 Xilinx, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#address-cells = <1>;
#size-cells = <0>;
num-cs = <1>;
- flash@0 {
+ flash0: flash@0 {
compatible = "n25q128a11";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <1>;
- partition@qspi-fsbl-uboot {
+ partition@0 {
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
- partition@qspi-linux {
+ partition@100000 {
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
- partition@qspi-device-tree {
+ partition@600000 {
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
- partition@qspi-rootfs {
+ partition@620000 {
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
- partition@qspi-bitstream {
+ partition@c00000 {
label = "qspi-bitstream";
reg = <0xC00000 0x400000>;
};