target/linux/generic/hack-4.14/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch

   1 From: Ben Menchaca <ben.menchaca@qca.qualcomm.com>
   2 Date: Fri, 7 Jun 2013 18:35:22 -0500
   3 Subject: MIPS: r4k_cache: use more efficient cache blast
   4
   5 Optimize the compiler output for larger cache blast cases that are
   6 common for DMA-based networking.
   7
   8 Signed-off-by: Ben Menchaca <ben.menchaca@qca.qualcomm.com>
   9 Signed-off-by: Felix Fietkau <nbd@nbd.name>
  10 ---
  11 --- a/arch/mips/include/asm/r4kcache.h
  12 +++ b/arch/mips/include/asm/r4kcache.h
  13 @@ -683,16 +683,48 @@ static inline void prot##extra##blast_##
  14                                                     unsigned long end)  \
  15  {                                                                      \
  16         unsigned long lsize = cpu_##desc##_line_size();                 \
  17 +       unsigned long lsize_2 = lsize * 2;                              \
  18 +       unsigned long lsize_3 = lsize * 3;                              \
  19 +       unsigned long lsize_4 = lsize * 4;                              \
  20 +       unsigned long lsize_5 = lsize * 5;                              \
  21 +       unsigned long lsize_6 = lsize * 6;                              \
  22 +       unsigned long lsize_7 = lsize * 7;                              \
  23 +       unsigned long lsize_8 = lsize * 8;                              \
  24         unsigned long addr = start & ~(lsize - 1);                      \
  25 -       unsigned long aend = (end - 1) & ~(lsize - 1);                  \
  26 +       unsigned long aend = (end + lsize - 1) & ~(lsize - 1);          \
  27 +       int lines = (aend - addr) / lsize;                              \
  28                                                                         \
  29         __##pfx##flush_prologue                                         \
  30                                                                         \
  31 -       while (1) {                                                     \
  32 +       while (lines >= 8) {                                            \
  33 +               prot##cache_op(hitop, addr);                            \
  34 +               prot##cache_op(hitop, addr + lsize);                    \
  35 +               prot##cache_op(hitop, addr + lsize_2);                  \
  36 +               prot##cache_op(hitop, addr + lsize_3);                  \
  37 +               prot##cache_op(hitop, addr + lsize_4);                  \
  38 +               prot##cache_op(hitop, addr + lsize_5);                  \
  39 +               prot##cache_op(hitop, addr + lsize_6);                  \
  40 +               prot##cache_op(hitop, addr + lsize_7);                  \
  41 +               addr += lsize_8;                                        \
  42 +               lines -= 8;                                             \
  43 +       }                                                               \
  44 +                                                                       \
  45 +       if (lines & 0x4) {                                              \
  46 +               prot##cache_op(hitop, addr);                            \
  47 +               prot##cache_op(hitop, addr + lsize);                    \
  48 +               prot##cache_op(hitop, addr + lsize_2);                  \
  49 +               prot##cache_op(hitop, addr + lsize_3);                  \
  50 +               addr += lsize_4;                                        \
  51 +       }                                                               \
  52 +                                                                       \
  53 +       if (lines & 0x2) {                                              \
  54 +               prot##cache_op(hitop, addr);                            \
  55 +               prot##cache_op(hitop, addr + lsize);                    \
  56 +               addr += lsize_2;                                        \
  57 +       }                                                               \
  58 +                                                                       \
  59 +       if (lines & 0x1) {                                              \
  60                 prot##cache_op(hitop, addr);                            \
  61 -               if (addr == aend)                                       \
  62 -                       break;                                          \
  63 -               addr += lsize;                                          \
  64         }                                                               \
  65                                                                         \
  66         __##pfx##flush_epilogue                                         \