3 * Texas Instruments <www.ti.com>
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Alex Zuepke <azu@sysgo.de>
13 * (C) Copyright 2002-2004
14 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
17 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
19 * See file CREDITS for list of people who contributed to this
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License as
24 * published by the Free Software Foundation; either version 2 of
25 * the License, or (at your option) any later version.
27 * This program is distributed in the hope that it will be useful,
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
30 * GNU General Public License for more details.
32 * You should have received a copy of the GNU General Public License
33 * along with this program; if not, write to the Free Software
34 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
40 #define TIMER_LOAD_VAL 0xffffffff
42 /* macro to read the 32 bit timer */
43 #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
45 static ulong timestamp;
48 #define TIMER_ENABLE (1 << 7)
49 #define TIMER_MODE_MSK (1 << 6)
50 #define TIMER_MODE_FR (0 << 6)
51 #define TIMER_MODE_PD (1 << 6)
53 #define TIMER_INT_EN (1 << 5)
54 #define TIMER_PRS_MSK (3 << 2)
55 #define TIMER_PRS_8S (1 << 3)
56 #define TIMER_SIZE_MSK (1 << 2)
57 #define TIMER_ONE_SHT (1 << 0)
63 /* 1st disable the Timer */
64 tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
65 tmr_ctrl_val &= ~TIMER_ENABLE;
66 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
69 * The Timer Control Register has one Undefined/Shouldn't Use Bit
70 * So we should do read/modify/write Operation
74 * Timer Mode : Free Running
75 * Interrupt : Disabled
76 * Prescale : 8 Stage, Clk/256
77 * Tmr Siz : 16 Bit Counter
78 * Tmr in Wrapping Mode
80 tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
81 tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
82 tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
84 *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
86 /* init the timestamp and lastdec value */
93 * timer without interrupts
96 void reset_timer (void)
98 reset_timer_masked ();
101 ulong get_timer (ulong base)
103 return get_timer_masked () - base;
106 void set_timer (ulong t)
111 /* delay x useconds AND perserve advance timstamp value */
112 void udelay (unsigned long usec)
116 if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
117 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
118 tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
119 tmo /= 1000; /* finish normalize. */
120 }else{ /* else small number, don't kill it prior to HZ multiply */
121 tmo = usec * CONFIG_SYS_HZ;
125 tmp = get_timer (0); /* get current timestamp */
126 if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
127 reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
129 tmo += tmp; /* else, set advancing stamp wake up time */
131 while (get_timer_masked () < tmo)/* loop till event */
135 void reset_timer_masked (void)
138 lastdec = READ_TIMER; /* capure current decrementer value time */
139 timestamp = 0; /* start "advancing" time stamp from 0 */
142 ulong get_timer_masked (void)
144 ulong now = READ_TIMER; /* current tick value */
146 if (lastdec >= now) { /* normal mode (non roll) */
148 timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
149 } else { /* we have overflow of the count down timer */
150 /* nts = ts + ld + (TLV - now)
151 * ts=old stamp, ld=time that passed before passing through -1
152 * (TLV-now) amount of time after passing though -1
153 * nts = new "advancing time stamp"...it could also roll and cause problems.
155 timestamp += lastdec + TIMER_LOAD_VAL - now;
162 /* waits specified delay value and resets timestamp */
163 void udelay_masked (unsigned long usec)
169 if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
170 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
171 tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
172 tmo /= 1000; /* finish normalize. */
173 } else { /* else small number, don't kill it prior to HZ multiply */
174 tmo = usec * CONFIG_SYS_HZ;
178 endtime = get_timer_masked () + tmo;
181 ulong now = get_timer_masked ();
182 diff = endtime - now;
187 * This function is derived from PowerPC code (read timebase as long long).
188 * On ARM it just returns the timer value.
190 unsigned long long get_ticks(void)
196 * This function is derived from PowerPC code (timebase clock frequency).
197 * On ARM it returns the number of timer ticks per second.
199 ulong get_tbclk (void)
203 tbclk = CONFIG_SYS_HZ;