2 * Copyright 2014-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <linux/errno.h>
10 #include <asm/arch/fsl_serdes.h>
11 #include <asm/arch/soc.h>
12 #include <fsl-mc/ldpaa_wriop.h>
14 #ifdef CONFIG_SYS_FSL_SRDS_1
15 static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
17 #ifdef CONFIG_SYS_FSL_SRDS_2
18 static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
21 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
22 int xfi_dpmac[XFI8 + 1];
23 int sgmii_dpmac[SGMII16 + 1];
26 __weak void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)
32 *The return value of this func is the serdes protocol used.
33 *Typically this function is called number of times depending
34 *upon the number of serdes blocks in the Silicon.
35 *Zero is used to denote that no serdes was enabled,
36 *this is the case when golden RCW was used where DPAA2 bring was
37 *intentionally removed to achieve boot to prompt
40 __weak int serdes_get_number(int serdes, int cfg)
45 int is_serdes_configured(enum srds_prtcl device)
49 #ifdef CONFIG_SYS_FSL_SRDS_1
50 if (!serdes1_prtcl_map[NONE])
53 ret |= serdes1_prtcl_map[device];
55 #ifdef CONFIG_SYS_FSL_SRDS_2
56 if (!serdes2_prtcl_map[NONE])
59 ret |= serdes2_prtcl_map[device];
65 int serdes_get_first_lane(u32 sd, enum srds_prtcl device)
67 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
72 #ifdef CONFIG_SYS_FSL_SRDS_1
74 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]);
75 cfg &= FSL_CHASSIS3_SRDS1_PRTCL_MASK;
76 cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT;
79 #ifdef CONFIG_SYS_FSL_SRDS_2
81 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS2_REGSR - 1]);
82 cfg &= FSL_CHASSIS3_SRDS2_PRTCL_MASK;
83 cfg >>= FSL_CHASSIS3_SRDS2_PRTCL_SHIFT;
87 printf("invalid SerDes%d\n", sd);
91 cfg = serdes_get_number(sd, cfg);
93 /* Is serdes enabled at all? */
97 for (i = 0; i < SRDS_MAX_LANES; i++) {
98 if (serdes_get_prtcl(sd, cfg, i) == device)
105 void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask,
106 u32 sd_prctl_shift, u8 serdes_prtcl_map[SERDES_PRCTL_COUNT])
108 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
112 if (serdes_prtcl_map[NONE])
115 memset(serdes_prtcl_map, 0, sizeof(u8) * SERDES_PRCTL_COUNT);
117 cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask;
118 cfg >>= sd_prctl_shift;
120 cfg = serdes_get_number(sd, cfg);
121 printf("Using SERDES%d Protocol: %d (0x%x)\n", sd + 1, cfg, cfg);
123 if (!is_serdes_prtcl_valid(sd, cfg))
124 printf("SERDES%d[PRTCL] = 0x%x is not valid\n", sd + 1, cfg);
126 for (lane = 0; lane < SRDS_MAX_LANES; lane++) {
127 enum srds_prtcl lane_prtcl = serdes_get_prtcl(sd, cfg, lane);
128 if (unlikely(lane_prtcl >= SERDES_PRCTL_COUNT))
129 debug("Unknown SerDes lane protocol %d\n", lane_prtcl);
131 serdes_prtcl_map[lane_prtcl] = 1;
132 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
133 switch (lane_prtcl) {
138 wriop_init_dpmac_qsgmii(sd, (int)lane_prtcl);
141 if (lane_prtcl >= XFI1 && lane_prtcl <= XFI8)
143 xfi_dpmac[lane_prtcl],
146 if (lane_prtcl >= SGMII1 &&
147 lane_prtcl <= SGMII16)
148 wriop_init_dpmac(sd, sgmii_dpmac[
157 /* Set the first element to indicate serdes has been initialized */
158 serdes_prtcl_map[NONE] = 1;
161 void fsl_serdes_init(void)
163 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
166 for (i = XFI1, j = 1; i <= XFI8; i++, j++)
169 for (i = SGMII1, j = 1; i <= SGMII16; i++, j++)
173 #ifdef CONFIG_SYS_FSL_SRDS_1
174 serdes_init(FSL_SRDS_1,
175 CONFIG_SYS_FSL_LSCH3_SERDES_ADDR,
176 FSL_CHASSIS3_SRDS1_REGSR,
177 FSL_CHASSIS3_SRDS1_PRTCL_MASK,
178 FSL_CHASSIS3_SRDS1_PRTCL_SHIFT,
181 #ifdef CONFIG_SYS_FSL_SRDS_2
182 serdes_init(FSL_SRDS_2,
183 CONFIG_SYS_FSL_LSCH3_SERDES_ADDR + FSL_SRDS_2 * 0x10000,
184 FSL_CHASSIS3_SRDS2_REGSR,
185 FSL_CHASSIS3_SRDS2_PRTCL_MASK,
186 FSL_CHASSIS3_SRDS2_PRTCL_SHIFT,