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(parent: 233750d) | patch
arm64: zynqmp: Sync names for SC with Versal
authorMichal Simek <michal.simek@xilinx.com>
Fri, 28 Jun 2019 11:16:10 +0000 (13:16 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 24 Oct 2019 11:37:01 +0000 (13:37 +0200)
commit50d92833477eb582bed7cab9449997c3a39b6f17
tree43a2773f92a2176dbcf86ad8cf5655fd86064054tree | snapshot
parent233750d3a12ccf8e8c2e889dc3ff685637b32df4commit | diff
arm64: zynqmp: Sync names for SC with Versal

ZynqMP based System controller is present on Versal boards. This patch is
aligning names with Versal to follow the spec.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
14 files changed:
arch/arm/dts/Makefile diff | blob | history
arch/arm/dts/zynqmp-a2197-g-revA.dts [deleted file] blob | history
arch/arm/dts/zynqmp-a2197-m-revA.dts [deleted file] blob | history
arch/arm/dts/zynqmp-a2197-p-revA.dts [deleted file] blob | history
arch/arm/dts/zynqmp-g-a2197-00-revA.dts [new file with mode: 0644] blob
arch/arm/dts/zynqmp-m-a2197-01-revA.dts [new file with mode: 0644] blob
arch/arm/dts/zynqmp-p-a2197-00-revA.dts [new file with mode: 0644] blob
configs/xilinx_zynqmp_a2197_g_revA_defconfig [deleted file] blob | history
configs/xilinx_zynqmp_a2197_m_revA_defconfig [deleted file] blob | history
configs/xilinx_zynqmp_a2197_p_revA_defconfig [deleted file] blob | history
configs/xilinx_zynqmp_a2197_revA_defconfig diff | blob | history
configs/xilinx_zynqmp_g_a2197_00_revA_defconfig [new file with mode: 0644] blob
configs/xilinx_zynqmp_m_a2197_01_revA_defconfig [new file with mode: 0644] blob
configs/xilinx_zynqmp_p_a2197_00_revA_defconfig [new file with mode: 0644] blob
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