mpc85xx: ddr: Always start DDR RAM in Self Refresh mode
authorJoakim Tjernlund <joakim.tjernlund@infinera.com>
Wed, 27 Nov 2019 18:35:10 +0000 (19:35 +0100)
committerPriyanka Jain <priyanka.jain@nxp.com>
Mon, 23 Dec 2019 08:37:55 +0000 (14:07 +0530)
commit2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee
tree251f9fa102648ac6c3167aa1a0694cbdd4a6b97c
parent71094b72d7113cbb2c566eac43fc122a18e5c6f9
mpc85xx: ddr: Always start DDR RAM in Self Refresh mode

Some of t1042 boards fails DDR init with an Automatic calibration error
every now and then. Investigations revealed that true Warm boots
never failed. Warm boots has some extra steps performed, one being
to start DDRC in Self Refresh and then clearing SR right after.
Applying this SR method unconditionally made all our boards
stable again, regardless of Cold/Warm boot.

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
drivers/ddr/fsl/mpc85xx_ddr_gen3.c