oweals/u-boot.git
4 years agoPrepare v2020.01-rc3 v2020.01-rc3
Tom Rini [Tue, 19 Nov 2019 02:31:49 +0000 (21:31 -0500)]
Prepare v2020.01-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'video-for-v2020.01-rc2' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Mon, 18 Nov 2019 15:48:29 +0000 (10:48 -0500)]
Merge tag 'video-for-v2020.01-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-video

- fix i.MX6ULL evk black screen observed while reboot stress tests
- remove "synopsys,dw-mipi-dsi" compatible to reduce the device tree
  differences between Linux and U-Boot for stm32mp1 platform

4 years agoMerge tag 'u-boot-rockchip-20191118' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 18 Nov 2019 02:15:57 +0000 (21:15 -0500)]
Merge tag 'u-boot-rockchip-20191118' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- Add support for rockchip SoC: PX30, RK3308
- Add and migrate to use common dram driver: PX30, RK3328, RK3399
- Add rk3399 board Tinker-s support
- Board config update for Rock960, Rockpro64

4 years agoMerge tag 'dm-pull-14nov19' of git://git.denx.de/u-boot-dm
Tom Rini [Mon, 18 Nov 2019 02:15:23 +0000 (21:15 -0500)]
Merge tag 'dm-pull-14nov19' of git://git.denx.de/u-boot-dm

Add OP-TEE test swuit
Fix patman cc_file output
Minor sandbox/pinctrl changes

4 years agorockchip: dts: tinker: Add tinker-s board support
Michael Trimarchi [Fri, 15 Nov 2019 21:07:24 +0000 (22:07 +0100)]
rockchip: dts: tinker: Add tinker-s board support

Support tinker-s board. The board is equivalent of tinker board
except of emmc.

TODO:
- support of usb current burst when the board is powered from pc

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: dts: tinker: Move u-boot dmc initialization to specific section
Michael Trimarchi [Fri, 15 Nov 2019 21:07:23 +0000 (22:07 +0100)]
rockchip: dts: tinker: Move u-boot dmc initialization to specific section

dmc is used to initialize the memory controller. It's needed by
u-boot. Move it in the specific section

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: imply instead of selecting SPL_SYS_MALLOC_SIMPLE
Thomas Hebb [Fri, 15 Nov 2019 16:48:57 +0000 (08:48 -0800)]
rockchip: imply instead of selecting SPL_SYS_MALLOC_SIMPLE

We shouldn't force which allocator the SPL uses, since there's no
platform requirement for one over the other: in fact, we currently allow
selection of the TPL allocator but not the SPL one!

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: allow DRAM init in SPL
Thomas Hebb [Fri, 15 Nov 2019 16:48:56 +0000 (08:48 -0800)]
rockchip: allow DRAM init in SPL

The common SPL removed SoC-specific code for RK3399's SPL and in the
process caused the previously-unconditional DRAM initialization in
board_init_f() to only happen when compiling a configuration that does not
support TPL, meaning DRAM never gets initialized if TPL is supported but
disabled.

Fix this by omitting the DRAM init in SPL only when we are configured to
also build a TPL. This fixes custom configurations that have disabled
TPL, and it should also unbreak the "ficus-rk3399", "rock960-rk3399",
and "chromebook_bob" defconfigs, although since I don't have any of
those devices I can't confirm they're broken now.

Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file")

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: SPL: fix ordering of DRAM init
Thomas Hebb [Fri, 15 Nov 2019 16:48:55 +0000 (08:48 -0800)]
rockchip: SPL: fix ordering of DRAM init

The common SPL code reordered the DRAM initialization before
rockchip_stimer_init(), which as far as I can tell causes the RK3399 to
lock up completely.

Fix this issue in the common code by putting the DRAM init back after
timer init. I have only tested this on the RK3399, but it wouldn't make
any sense for the timer init to require DRAM be set up on any system.

Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file")

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agodoc: rockchip: Add documentation for rk3308 based boards
Andy Yan [Thu, 14 Nov 2019 03:23:17 +0000 (11:23 +0800)]
doc: rockchip: Add documentation for rk3308 based boards

Add build documentation for rk3308 based boards.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3308: Add support for ROC-RK3308-CC board
Andy Yan [Thu, 14 Nov 2019 03:23:02 +0000 (11:23 +0800)]
rockchip: rk3308: Add support for ROC-RK3308-CC board

ROC-RK3308-CC is a rk3308 based board designed by
Firelfy, with eMMC and 256MB DDR3 and RTL8188 Wifi
on board.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3308: Add dts for ROC-RK3308-CC
Andy Yan [Thu, 14 Nov 2019 03:22:47 +0000 (11:22 +0800)]
rockchip: rk3308: Add dts for ROC-RK3308-CC

Add dts file for ROC-RK3308-CC from firefly.

Sync form linux rockchip for v5.5-armsoc/dts64:
"arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc"
(sha1: 4403e1237be3af0977aa23ef399e3496316317a0)

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: mkimage: add support for RK3308
Andy Yan [Thu, 14 Nov 2019 03:22:34 +0000 (11:22 +0800)]
rockchip: mkimage: add support for RK3308

Usage:

 (1) tools/mkimage -n rk3308 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
 (2) cat spl/u-boot-spl.bin >> idbloader.img
 (3) upgrade_tool wl 0x40 idbloader.img

Note:
  When use ddr binary from rkbin as tpl, use it replace u-boot-tpl.bin in(1)

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3308: Add sdram driver
Andy Yan [Thu, 14 Nov 2019 03:22:18 +0000 (11:22 +0800)]
rockchip: rk3308: Add sdram driver

A dm based dram driver for rk3308 u-boot
to get capacity.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoboard: rockchip: Add rk3308 evb support
Andy Yan [Thu, 14 Nov 2019 03:21:15 +0000 (11:21 +0800)]
board: rockchip: Add rk3308 evb support

Add support for rk3308 evaluation board.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: dts: rockchip: Add dts for rk3308 evb
Andy Yan [Thu, 14 Nov 2019 03:21:14 +0000 (11:21 +0800)]
arm: dts: rockchip: Add dts for rk3308 evb

Add dts for rk3308 evb, sync from the linux kernel
upstream list [0].

[0]https://patchwork.kernel.org/patch/11201555/

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: clk: Add clk driver for rk3308
Finley Xiao [Thu, 14 Nov 2019 03:21:13 +0000 (11:21 +0800)]
rockchip: clk: Add clk driver for rk3308

Add clk controller driver for RK3308 SOC.

This patch depends on Elaine's pll patch[0].

[0]http://patchwork.ozlabs.org/patch/1183718/

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: rockchip: Add RK3308 SOC support
Andy Yan [Thu, 14 Nov 2019 03:21:12 +0000 (11:21 +0800)]
arm: rockchip: Add RK3308 SOC support

RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: clk: pll: add common pll setting funcs
Elaine Zhang [Fri, 25 Oct 2019 01:42:17 +0000 (09:42 +0800)]
rockchip: clk: pll: add common pll setting funcs

Common PLL setup function, compatible with different SOC.
Mainly for the subsequent new SOC use.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: orangepi: Add init value for vdd_log
Kever Yang [Wed, 13 Nov 2019 03:14:12 +0000 (11:14 +0800)]
rockchip: rk3399: orangepi: Add init value for vdd_log

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: khadas-edge: Add init value for vdd_log
Kever Yang [Wed, 13 Nov 2019 03:14:11 +0000 (11:14 +0800)]
rockchip: rk3399: khadas-edge: Add init value for vdd_log

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: rock-pi4: Add init value for vdd_log
Kever Yang [Wed, 13 Nov 2019 03:14:10 +0000 (11:14 +0800)]
rockchip: rk3399: rock-pi4: Add init value for vdd_log

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rk3399-rock960: add vdd_log and its init value
Kever Yang [Wed, 13 Nov 2019 03:14:09 +0000 (11:14 +0800)]
arm64: dts: rk3399-rock960: add vdd_log and its init value

Add vdd_log node according to rock960 schematic V13.
This patch affect two boards:
- Rock960 Model A
- Ficus

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
4 years agorockchip: dts: rk3399-firefly: move u-boot, spl-boot-order to to the u-boot.dtsi
Peter Robinson [Sat, 9 Nov 2019 20:30:07 +0000 (20:30 +0000)]
rockchip: dts: rk3399-firefly: move u-boot, spl-boot-order to to the u-boot.dtsi

The u-boot specific device tree directives should be in u-boot.dtsi

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: dts: rk3399-evb: move u-boot, spl-boot-order to to the u-boot.dtsi
Peter Robinson [Sat, 9 Nov 2019 20:30:06 +0000 (20:30 +0000)]
rockchip: dts: rk3399-evb: move u-boot, spl-boot-order to to the u-boot.dtsi

The u-boot specific device tree directives should be in u-boot.dtsi

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: dts: rk3399: move the u-boot, dm-pre-reloc to the u-boot.dtsi
Peter Robinson [Sat, 9 Nov 2019 20:30:05 +0000 (20:30 +0000)]
rockchip: dts: rk3399: move the u-boot, dm-pre-reloc to the u-boot.dtsi

The u-boot specific pieces in the dts files should be in u-boot.dtsi
not the main files, this allows easier sync with upstream. The
rk3399.dtsi has a mix of both so move them all for consistency.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Fix with missing pmugrf)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: split rockpro64 out of evb_rk3399
Vasily Khoruzhick [Sat, 9 Nov 2019 19:24:50 +0000 (11:24 -0800)]
rockchip: rk3399: split rockpro64 out of evb_rk3399

rockpro64 needs to setup I/O domains in order for USB to work in u-boot.
Since we currently don't have a driver to do that, split it into its own
board file and initialize I/O domains here.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: clk: fix wrong CONFIG_IS_ENABLED handling
Heiko Stuebner [Fri, 8 Nov 2019 23:06:30 +0000 (00:06 +0100)]
rockchip: clk: fix wrong CONFIG_IS_ENABLED handling

CONFIG_IS_ENABLED() needs the config name like used in Kconfig, so
without the leading CONFIG_. The clock drivers all wrongly check for
CONFIG_RESET_ROCKCHIP, fix that

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: clk: rv1108: remove duplicate reset init
Heiko Stuebner [Fri, 8 Nov 2019 23:06:29 +0000 (00:06 +0100)]
rockchip: clk: rv1108: remove duplicate reset init

rockchip_reset_bind() already does the needed init for the reset
registers, only referenced the wrong cru structure.

So we can get rid of the open-coded reset init and just fix
the correct cru reference.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: dts: rk3399-rockpro64: slightly increase center voltage
Soeren Moch [Thu, 7 Nov 2019 11:11:22 +0000 (12:11 +0100)]
arm: dts: rk3399-rockpro64: slightly increase center voltage

The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage
scaling. So the regulator reset voltage of 0.9V is used on this board.
Let u-boot initialize the center voltage to 0.95V as it is done for the
VD_LOGIC domain. This avoids instability and occasional linux kernel
Opses on this board.

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: dts: rk3399-rockpro64: sync dts from linux kernel
Soeren Moch [Thu, 7 Nov 2019 11:11:21 +0000 (12:11 +0100)]
arm: dts: rk3399-rockpro64: sync dts from linux kernel

The most important change for u-boot is the fix for the vdd-log pwm
voltage regulator to avoid overvoltage for the VD_LOGIC power domain.

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: rk3399: rock960: Update config for TPL
Peter Robinson [Wed, 6 Nov 2019 11:43:05 +0000 (11:43 +0000)]
rockchip: rk3399: rock960: Update config for TPL

Enable TPL for rock960 like other rk3399 boards.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoconfigs: Rename roc-rk3399-pc -> roc-pc-rk3399 defconfig
Jagan Teki [Sat, 2 Nov 2019 04:49:02 +0000 (10:19 +0530)]
configs: Rename roc-rk3399-pc -> roc-pc-rk3399 defconfig

roc-rk3399-pc_defconfig is committed in below

commit <8a681f4c5aa15db51ad0209734859c9fe7c29cfd> ("rockchip: rk3399:
Add ROC-RK3399-PC support")

which doesn't follow the existing defconfigs on rk3399.

So, rename as followed with other rk3399 defconfigs.

Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm: dts: rk3399-roc-pc: Sync latest dts changes from Linux
Jagan Teki [Wed, 16 Oct 2019 15:19:40 +0000 (20:49 +0530)]
arm: dts: rk3399-roc-pc: Sync latest dts changes from Linux

Few important regulator power rails fixes are available in
linux-next, so sync them same.

Here is the last commit details:
commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts:
rockchip: Fix roc-rk3399-pc regulator input rails")

Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: Init driver otg_data for rk3288 usb phy
Kever Yang [Wed, 16 Oct 2019 09:13:32 +0000 (17:13 +0800)]
rockchip: Init driver otg_data for rk3288 usb phy

RK3288 needs to init the otg_data in board level to make the phy driver
work.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: usb: Migrate to use ofnode
Kever Yang [Wed, 16 Oct 2019 09:13:31 +0000 (17:13 +0800)]
rockchip: usb: Migrate to use ofnode

Migrate to use ofnode_* instead of fdt_* so that we may able to use live
dt for usb udc driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: add px30-evb board
Heiko Stuebner [Tue, 16 Jul 2019 20:19:43 +0000 (22:19 +0200)]
rockchip: add px30-evb board

The px30 evb is an evaluation board for the px30 together with a dsi-
connected display. This adds board and config files for it.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: add px30 architecture core
Heiko Stuebner [Tue, 16 Jul 2019 20:18:21 +0000 (22:18 +0200)]
rockchip: add px30 architecture core

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: add px30 devicetrees
Heiko Stuebner [Tue, 16 Jul 2019 20:12:07 +0000 (22:12 +0200)]
rockchip: add px30 devicetrees

Add px30 related devicetrees synced from the Linux kernel.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: misc: read cpuid either from efuse or otp
Heiko Stuebner [Wed, 25 Sep 2019 18:21:21 +0000 (20:21 +0200)]
rockchip: misc: read cpuid either from efuse or otp

Newer Rockchip socs use a different ip block to handle one-time-
programmable memory, so depending on what got enabled get the cpuid
from either source.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agomisc: add driver for the Rockchip otp controller
Finley Xiao [Wed, 25 Sep 2019 15:57:49 +0000 (17:57 +0200)]
misc: add driver for the Rockchip otp controller

Newer Rockchip socs like the px30 use a different ip block to handle
one-time-programmable memory, so add a misc driver for it as well.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: mkimage: add support for px30
Kever Yang [Fri, 12 Jul 2019 09:43:34 +0000 (11:43 +0200)]
rockchip: mkimage: add support for px30

Add the table entry for px30 socs.
The px30 has 10K of sram available.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agonet: gmac_rockchip: add support for px30
Heiko Stuebner [Tue, 23 Jul 2019 23:20:29 +0000 (01:20 +0200)]
net: gmac_rockchip: add support for px30

Add the glue code to allow the px30 variant of the Rockchip gmac
to provide network functionality.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: clk: add px30 clock driver
Kever Yang [Thu, 11 Jul 2019 08:42:16 +0000 (10:42 +0200)]
rockchip: clk: add px30 clock driver

The px30 contains 2 separate clock controllers, pmucru and cru.
Add drivers for them.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agopinctrl: rockchip: add px30 pinctrl driver
David Wu [Thu, 11 Jul 2019 08:37:14 +0000 (10:37 +0200)]
pinctrl: rockchip: add px30 pinctrl driver

Add the necessary glue code to allow pinctrl setting on px30 socs.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: add core px30 headers
Heiko Stuebner [Tue, 16 Jul 2019 20:17:13 +0000 (22:17 +0200)]
rockchip: add core px30 headers

Add headers needed by the upcoming px30 support, including two
new dt-binding headers taken from the Linux kernel.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agospl: separate SPL_FRAMEWORK config for spl and tpl
Heiko Stuebner [Tue, 16 Jul 2019 08:12:02 +0000 (10:12 +0200)]
spl: separate SPL_FRAMEWORK config for spl and tpl

Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all
cases, making the TPL bigger. There may be cases where the TPL is really
size constrained due to its underlying ram size.

Therefore introduce a new TPL_FRAMEWORK option and make the relevant
conditionals check for both. The default is set to "y if SPL_FRAMEWORK"
to mimic the previous behaviour where the TPL would always get the
SPL framework if it was enabled in SPL.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: Fix dram setting to make dram more stable
YouMin Chen [Fri, 15 Nov 2019 03:04:53 +0000 (11:04 +0800)]
ram: rk3399: Fix dram setting to make dram more stable

There are some code different with rockchip vendor code which may lead
to different bugs, including:
1) Fix setting error about LPDDR3 dram size ODT.
2) Set phy io speed to 0x2.
3) Fix setting error about phy_pad_fdbk_drive.
4) Fix setting error about PI_WDQLVL_VREF_EN

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: update calculate_stride
Kever Yang [Fri, 15 Nov 2019 03:04:52 +0000 (11:04 +0800)]
ram: rk3399: update calculate_stride

Update the calculation of the stride to support all the DRAM case.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: Sync the io setting from Rockchip vendor code
Kever Yang [Fri, 15 Nov 2019 03:04:51 +0000 (11:04 +0800)]
ram: rk3399: Sync the io setting from Rockchip vendor code

The io setting are updated after some bugfix in different rk3399 boards,
sync the code from vendor.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: update lpddr4 timing for rk3399
Kever Yang [Fri, 15 Nov 2019 03:04:50 +0000 (11:04 +0800)]
ram: rockchip: update lpddr4 timing for rk3399

Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip
vendor code;

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: add support detect capacity
YouMin Chen [Fri, 15 Nov 2019 03:04:49 +0000 (11:04 +0800)]
ram: rk3399: add support detect capacity

Add capacity detect for rk3399 so that the driver able to detect the
capacity automatically.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: update the function of sdram_init
YouMin Chen [Fri, 15 Nov 2019 03:04:48 +0000 (11:04 +0800)]
ram: rk3399: update the function of sdram_init

Clean up the sdram_init to keep sync with rockchip source code.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: fix error about get_ddrc0_con reg addr
YouMin Chen [Fri, 15 Nov 2019 03:04:47 +0000 (11:04 +0800)]
ram: rk3399: fix error about get_ddrc0_con reg addr

Correct the register to its correct name.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: Clean up code
YouMin Chen [Fri, 15 Nov 2019 03:04:46 +0000 (11:04 +0800)]
ram: rk3399: Clean up code

Clean up rk3399 dram driver source code for more readable.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3399: migrate to use common code
YouMin Chen [Fri, 15 Nov 2019 03:04:45 +0000 (11:04 +0800)]
ram: rk3399: migrate to use common code

For there are some structures and functions are common for all rockchip SoCs,
migrate to use the common code so that we can clean up reduandent codes.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rk3328: use common sdram driver
YouMin Chen [Fri, 15 Nov 2019 03:04:44 +0000 (11:04 +0800)]
ram: rk3328: use common sdram driver

RK3328 has a similar controller and phy with PX30, so we can use the
common driver for it and remove the duplicate codes.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: px30: add sdram driver
YouMin Chen [Fri, 15 Nov 2019 03:04:43 +0000 (11:04 +0800)]
ram: px30: add sdram driver

Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3.

For TPL_BUILD, the driver implement full dram init and without DM
support due to the limit of internal SRAM size.
For SPL and U-Boot proper, it's a simple driver with dm for get
dram_info like other SoCs.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: add common msch reg definition
Kever Yang [Fri, 15 Nov 2019 03:04:42 +0000 (11:04 +0800)]
ram: rockchip: add common msch reg definition

The noc register bit definition may be the same for different SoC while
the offset of the register may be different, add the struction
definition as common code.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: add phy driver code for PX30
Kever Yang [Fri, 15 Nov 2019 03:04:41 +0000 (11:04 +0800)]
ram: rockchip: add phy driver code for PX30

This sdram_phy_px30.c is based on PX30 SoC, the functions are common
for phy, other SoCs with similar hardware could re-use it.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: add controller code for PX30
Kever Yang [Fri, 15 Nov 2019 03:04:40 +0000 (11:04 +0800)]
ram: rockchip: add controller code for PX30

This sdram_pctl_px30.c is based on PX30 SoC, the functions are common
for controller, other SoCs with similar hardware could re-use it.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: Default enable DRAM debug info
Kever Yang [Fri, 15 Nov 2019 03:04:39 +0000 (11:04 +0800)]
ram: rockchip: Default enable DRAM debug info

The debug info for dram is main about the capacity related info which is
very important the board init, so set this default enable.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: move sdram_debug function into sdram_common
Kever Yang [Fri, 15 Nov 2019 03:04:38 +0000 (11:04 +0800)]
ram: rockchip: move sdram_debug function into sdram_common

The functions for dram info print are part of common code.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: add common code for sdram driver
Kever Yang [Fri, 15 Nov 2019 03:04:37 +0000 (11:04 +0800)]
ram: rockchip: add common code for sdram driver

There are some function like os_reg setting, capacity detect functions,
can be used as common code for different Rockchip SoCs, add a
sdram_common.c for all these functions.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: sdram: update the sys_reg to sys_reg2
Kever Yang [Fri, 15 Nov 2019 03:04:36 +0000 (11:04 +0800)]
rockchip: sdram: update the sys_reg to sys_reg2

We are using sys_reg2 and sys_reg3 as ddr cap info, sync the variable
name to what we real use to avoid confuse people.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: sdram: extend to use sys_reg3 for capacity info
Kever Yang [Fri, 15 Nov 2019 03:04:35 +0000 (11:04 +0800)]
rockchip: sdram: extend to use sys_reg3 for capacity info

Since we have new DRAM type and to support different DRAM size in different
CS, we need more bits, so introduce sys_reg3 to record the info.
Note that the info in sys_reg3 is extension to sys_reg2 and the info in
sys_reg2 is the same as before. We define the DRAM_INFO with sys_reg3 as
VERSION2.
All the ENC macro are moved to sdram_common.h since the sdram.c only
need to do the info decode.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: sdram: move cap structure and debug function to sdram_common.h
Kever Yang [Fri, 15 Nov 2019 03:04:34 +0000 (11:04 +0800)]
rockchip: sdram: move cap structure and debug function to sdram_common.h

The sdram.h suppose to be helper file for sdram.c which including dram
size decode and some u-boot related dram init interface, and all
structure and function for dram driver move to sdram_common.h

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: rename sdram_common.c/h to sdram.c
Kever Yang [Fri, 15 Nov 2019 03:04:33 +0000 (11:04 +0800)]
ram: rockchip: rename sdram_common.c/h to sdram.c

rename sdram_common.c in arch/arm/mach-rockchip to sdram.c;
so that we can use the file name sdram_common.c in dram driver for
better understand the code;
clean the related file who has use the header file at the same time.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoram: rockchip: rename sdram.h to sdram_rk3288.h
Kever Yang [Fri, 15 Nov 2019 03:04:32 +0000 (11:04 +0800)]
ram: rockchip: rename sdram.h to sdram_rk3288.h

The header file sdram.h is used for rk3288 and similar SoCs, rename it
to make it more understandable.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoMerge tag 'efi-2020-01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 14 Nov 2019 14:48:26 +0000 (09:48 -0500)]
Merge tag 'efi-2020-01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-01-rc3

The following changes for the UEFI subsystem are provided:

* allow building UEFI binaries on the sandbox
* enable access to file systems without partition tables
* correctly check the return value of efi_dp_from_file()

4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Thu, 14 Nov 2019 14:47:29 +0000 (09:47 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- Clearfog: Fix SD card booting (Baruch)
- Fix potential dereference NULL pointer in dram_init() (Chris)

4 years agopatman: fix coverletter cc list with nulls
Robert Beckett [Wed, 13 Nov 2019 18:39:45 +0000 (18:39 +0000)]
patman: fix coverletter cc list with nulls

fixes: 8ab452d5877638a97e5bdd521d119403b70b45f5

When compiling list of cover letter cc addresses, using null as a
separater, then encoding to utf-8 results in lots of "\x00" as
separators. patman then doesnt understand that when it comes to
repoting the list to send-email.

Fix this by not encoding to utf-8, as done for the other patch files.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: fix some typos in comments
Anatolij Gustschin [Sun, 27 Oct 2019 16:55:04 +0000 (17:55 +0100)]
patman: fix some typos in comments

s/Subprocress/Subprocess/
s/easiler/easier/
s/repositiory/repository/
s/rangem/range/
s/Retruns/Returns/

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agosandbox: use correct type reading /proc/self/maps
Heinrich Schuchardt [Sat, 26 Oct 2019 21:17:44 +0000 (23:17 +0200)]
sandbox: use correct type reading /proc/self/maps

Compiling arch/sandbox/cpu/os.c results in an error

../arch/sandbox/cpu/os.c: In function ‘os_find_text_base’:
../arch/sandbox/cpu/os.c:823:12: error: cast to pointer from
integer of different size [-Werror=int-to-pointer-cast]
  823 |     base = (void *)addr;
      |            ^
cc1: all warnings being treated as errors

The size of void* differs from that of unsigned long long on 32bit
systems.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotests: add OP-TEE test suite
Heiko Stuebner [Wed, 23 Oct 2019 14:46:41 +0000 (16:46 +0200)]
tests: add OP-TEE test suite

OP-TEE can get supplied with a devicetree and will then insert
its firmware node and reserved-memory sections into it.
As this devicetree often is not the one supplied to a later
loaded kernel, a previous commit added functionality to transfer
these nodes onto that new devicetree.

To make sure this functionality stays intact, also add a test
for the transfer functionality.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoimage: fdt: copy possible optee nodes to a loaded devicetree
Heiko Stuebner [Wed, 23 Oct 2019 14:46:40 +0000 (16:46 +0200)]
image: fdt: copy possible optee nodes to a loaded devicetree

The loading convention for optee or any other tee on arm64 is as bl32
parameter to the trusted-firmware. So TF-A gets invoked with the TEE as
bl32 and main u-boot as bl33. Once it has done its startup TF-A jumps
into the bl32 for the TEE startup, returns to TF-A and then jumps to bl33.

All of them get passed a devicetree as parameter and all components often
get loaded from a FIT image.

OP-TEE will create additional nodes in that devicetree namely a firmware
node and possibly multiple reserved-memory nodes.

While this devicetree is used in main u-boot, in most cases it won't be
the one passed to the actual kernel. Instead most boot commands will load
a new devicetree from somewhere like mass storage of the network, so if
that happens u-boot should transfer the optee nodes to that new devicetree.

To make that happen introduce optee_copy_fdt_nodes() called from the dt
setup function in image-fdt which after checking for the optee presence
in the u-boot dt will make sure a optee node is present in the kernel dt
and transfer any reserved-memory regions it can find.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
4 years agofdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory()
Heiko Stuebner [Wed, 23 Oct 2019 14:46:39 +0000 (16:46 +0200)]
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory()

The phandlep pointer returning the phandle to the caller is optional
and if it is not set when calling fdtdec_add_reserved_memory() it is
highly likely that the caller is not interested in a phandle to the
created reserved-memory area and really just wants that area added.

So just don't create a phandle in that case.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agofdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory()
Heiko Stuebner [Wed, 23 Oct 2019 14:46:38 +0000 (16:46 +0200)]
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory()

The change adding fdtdec_add_reserved_memory() already protected the added
phandle against the phandlep being NULL - making the phandlep var optional.

But in the early code checking for an already existing carveout this check
was not done and thus the phandle assignment could run into trouble,
so add a check there as well, which makes the function still return
successfully if a matching region is found, even though no-one wants to
work with the phandle.

Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopinctrol: dm: remove the function pinctrl_decode_pin_config
Patrick Delaunay [Wed, 23 Oct 2019 13:44:36 +0000 (15:44 +0200)]
pinctrol: dm: remove the function pinctrl_decode_pin_config

Remove the pinctrl_decode_pin_config() API, because this
function is unused and not compatible with livetree
(it uses fdtdec_get_bool instead of ofnode API).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoarm: mvebu: clearfog: fix boot from SD card
Baruch Siach [Sun, 3 Nov 2019 09:52:39 +0000 (11:52 +0200)]
arm: mvebu: clearfog: fix boot from SD card

Enable gpio0 in SPL to allow the sdhci driver read the SD card-detect
signal.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agoARM: mvebu: don't dereference null bd pointer
Chris Packham [Tue, 22 Oct 2019 07:05:25 +0000 (20:05 +1300)]
ARM: mvebu: don't dereference null bd pointer

As mentioned in doc/README.arm-relocation gd->bd is not available in
dram_init() so we shouldn't attempt to access it.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agoefi_selftest: enable all UEFI unit tests on the sandbox
Heinrich Schuchardt [Fri, 8 Nov 2019 20:17:58 +0000 (21:17 +0100)]
efi_selftest: enable all UEFI unit tests on the sandbox

As we can build relocation code for the sandbox now we should enable the
unit tests that had to be disabled up to now.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: support building UEFI binaries on sandbox
Heinrich Schuchardt [Thu, 7 Nov 2019 07:05:17 +0000 (08:05 +0100)]
efi_loader: support building UEFI binaries on sandbox

On the sandbox the UEFI binaries must match the host architectures.

Adjust the Makefiles. Provide the PE/COFF header and relocation files.

Allow building helloworld.efi on the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: call add_u_boot_and_runtime() on sandbox
Heinrich Schuchardt [Fri, 8 Nov 2019 19:42:53 +0000 (20:42 +0100)]
efi_loader: call add_u_boot_and_runtime() on sandbox

On the sandbox we should mark the stack area as EFI runtime memory like we
do on any other architecture.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: disk: install file system protocol to a whole disk
AKASHI Takahiro [Mon, 7 Oct 2019 05:59:39 +0000 (14:59 +0900)]
efi_loader: disk: install file system protocol to a whole disk

Currently, a whole disk without any partitions is not associated
with EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. So even if it houses some
file system, there is a chance that we may not be able to access
it, particularly, when accesses are to be attempted after searching
that protocol against a device handle.

With this patch, EFI_SIMPLE_FILE_SYSTEM_PROTOCOL is installed
to such a disk if part_get_info() shows there is no partition
table installed on it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Only if no partition table exists, check for a file system on disk level.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: fix efi_dp_from_name()
Heinrich Schuchardt [Wed, 30 Oct 2019 19:13:24 +0000 (20:13 +0100)]
efi_loader: fix efi_dp_from_name()

Correctly check the return value of efi_dp_from_file().
If we can determine device path for the file, should not depend on the
device path for the device being requested.
Provide a function description for efi_dp_from_name().

Reported-by: Coverity CID 273159, CID 273158
Fixes: 08c51fff30cc ("efi_loader: device_path: check against file path length")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'
Tom Rini [Tue, 12 Nov 2019 18:40:58 +0000 (13:40 -0500)]
Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'

- Migrate the symbol CONFIG_SYS_REDUNDAND_ENVIRONMENT to Kconfig.  This
  is size neutral outside of two platforms with latent bugs being fixed
  now and they no longer have "ENV_IS_NOWHERE" set along with their
  intended location.

4 years agodefconfigs: Migrate CONFIG_SYS_REDUNDAND_ENVIRONMENT
Tom Rini [Sun, 10 Nov 2019 16:28:03 +0000 (11:28 -0500)]
defconfigs: Migrate CONFIG_SYS_REDUNDAND_ENVIRONMENT

Move this symbol to Kconfig.  As part of this we can drop a UBI-specific
symbol that was a stop-gap for not having this particular symbol in
Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agopfla02: Migrate CONFIG_ENV_IS_IN_SPI_FLASH to defconfig
Tom Rini [Sat, 9 Nov 2019 22:49:20 +0000 (17:49 -0500)]
pfla02: Migrate CONFIG_ENV_IS_IN_SPI_FLASH to defconfig

This board is setting CONFIG_ENV_IS_IN_SPI_FLASH in the header rather
than defconfig, fix.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoevb-rk3128: Migrate CONFIG_ENV_IS_IN_MMC to defconfig
Tom Rini [Sat, 9 Nov 2019 22:33:49 +0000 (17:33 -0500)]
evb-rk3128: Migrate CONFIG_ENV_IS_IN_MMC to defconfig

This board is setting CONFIG_ENV_IS_IN_MMC in the header rather than
defconfig, fix.

Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agovideo: stm32: remove the compatible "synopsys, dw-mipi-dsi" support
Patrick Delaunay [Tue, 12 Nov 2019 14:39:58 +0000 (15:39 +0100)]
video: stm32: remove the compatible "synopsys, dw-mipi-dsi" support

Remove the compatible "synopsys,dw-mipi-dsi" added in U-Boot
(it don't exist in Linux kernel binding); it is only used
to bind the generic synopsys UCLASS_DSI_HOST "dw_mipi_dsi" to
the driver "stm32-display-dsi" UCLASS_VIDEO_BRIDGE

This binding is done in Linux kernel drivers without compatible
(dw_mipi_dsi_bind() is called in bind of driver, for example in
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c).

This patch does the same in U-Boot driver, the STM32 driver
calls during its bind the function device_bind_driver_to_node
to bind the generic driver "dw_mipi_dsi" at the same address.

This patch reduces the device tree differences
between Linux kernel and U-Boot for stm32mp1 platform.

Tested with v2020.01-rc1 on STM32MP157C-EV1 and STM32MP157C-DK2.

The dependency of driver is clearer and the probe order is guaranteed.

STM32MP> dm tree
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 root          0  [ + ]   root_driver           root_driver
 sysreset      0  [   ]   syscon_reboot         |-- reboot
 simple_bus    0  [ + ]   generic_simple_bus    |-- soc
 serial        0  [ + ]   serial_stm32          |   |-- serial@40010000
...
 video_brid    0  [ + ]   stm32-display-dsi     |   |-- dsi@5a000000
 dsi_host      0  [ + ]   dw_mipi_dsi           |   |   |-- dsihost
 panel         0  [ + ]   rm68200_panel         |   |   `-- panel-dsi@0
...

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agoMerge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Tue, 12 Nov 2019 12:18:23 +0000 (07:18 -0500)]
Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191105
-------------------
i.MX8MN SoC support
ROM API image download support
i.MX8MM enet enabling

4 years agovideo: mxsfb: Configure the clock after eLCDIF reset
Fabio Estevam [Fri, 1 Nov 2019 12:25:21 +0000 (09:25 -0300)]
video: mxsfb: Configure the clock after eLCDIF reset

Running stress reboot test on a i.MX6ULL evk board with a
custom LCD can lead to splash screen failure (black screen).

After comparing the eLCDIF initialization with the Linux kernel
driver, it was noticed that the eLCDIF reset is the first operation
that needs to be done.

So do like the eLCDIF Linux driver and move the eLCDIF clock
frequency configuration after the eLCDIF reset and just prior to
setting the RUN bit.

With this change applied, no more black screen issues has been
found during overnight reboot stress tests.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
4 years agoPrepare v2020.01-rc2 v2020.01-rc2
Tom Rini [Tue, 12 Nov 2019 02:01:10 +0000 (21:01 -0500)]
Prepare v2020.01-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoconfigs: Resync with savedefconfig
Tom Rini [Tue, 12 Nov 2019 01:04:24 +0000 (20:04 -0500)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agogitattributes: dont treat non-text files as text
Vignesh Rajendran [Fri, 8 Nov 2019 15:32:55 +0000 (16:32 +0100)]
gitattributes: dont treat non-text files as text

With recent update in u-boot gitattributes all files are treated as regular
text files. This creates problems with special files and repo always
shows uncommitted files like below.

Your branch is up-to-date with 'origin/master'.
Changes not staged for commit:
  (use "git add <file>..." to update what will be committed)
  (use "git checkout -- <file>..." to discard changes in working directory)

modified:   tools/logos/compulab.bmp
modified:   tools/logos/denx-comp.bmp
modified:   tools/logos/toradex.bmp

To fix above problem special files bmp/ttf files are treated as binary
files in the gitattributes.

Signed-off-by: Vignesh Rajendran <vignesh.rajendran@in.bosch.com>
Signed-off-by: Veeraiyan Chidambaram <veeraiyan.chidambaram@in.bosch.com>
4 years ago.gitignore: Ignore .img files
Michael Trimarchi [Sat, 9 Nov 2019 19:13:57 +0000 (20:13 +0100)]
.gitignore: Ignore .img files

The generated idbloader.img file that rockchip uses should
be not included in git status report

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 years agobinman: tegra: Adjust symbol calculation depending on end-at-4gb
Simon Glass [Thu, 7 Nov 2019 00:22:44 +0000 (17:22 -0700)]
binman: tegra: Adjust symbol calculation depending on end-at-4gb

A recent change adjusted the symbol calculation to work on x86 but broke
it for Tegra. In fact this is because they have different needs.

On x86 devices the code is linked to a ROM address and the end-at-4gb
property is used for the image. In this case there is no need to add the
base address of the image, since the base address is already built into
the offset and image-pos properties.

On other devices we must add the base address since the offsets start at
zero.

In addition the base address is currently added to the 'offset' and 'size'
values. It should in fact only be added to 'image-pos', since 'offset' is
relative to its parent and 'size' is not actually an address. This code
should have been adjusted when support for 'image-pos' and 'size' was
added, but it was not.

To correct these problems:
- move the code that handles adding the base address to section.py, which
  can check the end-at-4gb property and which property
  (offset/size/image-pos) is being read
- add the base address only when needed (only for image-pos and not if the
  image uses end-at-4gb)
- add a note to the documentation
- add a separate test to cover x86 behaviour

Fixes: 15c981cc (binman: Correct symbol calculation with non-zero image base)

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
4 years agoMerge tag 'u-boot-rockchip-20191110' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 11 Nov 2019 19:19:32 +0000 (14:19 -0500)]
Merge tag 'u-boot-rockchip-20191110' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- Add support for rockchip pmic rk805,rk809, rk816, rk817
- Add rk3399 board Leez support
- Fix bug in rk3328 ram driver
- Adapt SPL to support ATF bl31 with entry at 0x40000
- Fix the u8 type comparision with '-1'.
- Fix checkpatch warning for multi blank line and review signature.

4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Tom Rini [Mon, 11 Nov 2019 19:19:04 +0000 (14:19 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC.
- Few bug fixes and updates related to SPI, hwconfig, ethernet,
  fsl-layerscape, pci, icid, PSCI