oweals/u-boot.git
2 years agoMerge branch '2019-10-28-azure-ci-support'
Tom Rini [Wed, 30 Oct 2019 13:05:13 +0000 (09:05 -0400)]
Merge branch '2019-10-28-azure-ci-support'

- Clean up Travis-CI slightly and then add support for Microsoft Azure
  pipelines, all from Bin Meng.

2 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Wed, 30 Oct 2019 13:04:52 +0000 (09:04 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi

- H6 dts(i) sync (Clément)
- H6 PIO (Icenowy)
- Fix pll1 clock calculation (Stefan)
- H6 dram, half DQ (Jernej)
- A64 OLinuXino eMMC (Sunil)

2 years agoBring all testings in gitlab and travis CI to Azure Pipelines
Bin Meng [Mon, 28 Oct 2019 14:25:03 +0000 (07:25 -0700)]
Bring all testings in gitlab and travis CI to Azure Pipelines

This expands current Azure Pipelines Windows host tools build
testing to cover all the CI testing in gitlab and travis CI.

Note for some unknown reason, the 'container' cannot be used for
any jobs that have buildman, for buildman does not exit properly
and hangs the job forever. As a workaround, we manually call
docker to run the image to perform the CI tasks.

A complete run on Azure Pipelines takes about 2 hours and 10
minutes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years ago.travis.yml: Remove the unneeded '&' for ls20xx buildman
Bin Meng [Mon, 28 Oct 2019 14:25:02 +0000 (07:25 -0700)]
.travis.yml: Remove the unneeded '&' for ls20xx buildman

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2 years agoarm: mvebu: Avoid generating kwbimage.cfg in the source tree
Bin Meng [Mon, 28 Oct 2019 14:25:01 +0000 (07:25 -0700)]
arm: mvebu: Avoid generating kwbimage.cfg in the source tree

At present some boards generate kwbimage.cfg in the source tree
during the build. This breaks buildman testing on some systems
where the source tree is read-only. Update makefile rules to
generate it in the build tree instead.

Note some other boards have the kwbimage.cfg file written in
advance, hence we need check if the file exists in the build
tree first, otherwise we fall back to one in the source tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agotools: buildman: Remove useless mkdir() in Make() in test.py
Bin Meng [Mon, 28 Oct 2019 14:25:00 +0000 (07:25 -0700)]
tools: buildman: Remove useless mkdir() in Make() in test.py

In the 'Make' function, the codes tries to create a directory
if current stage is 'build'. But the directory isn't used at
all anywhere.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agotools: buildman: Honor output directory when generating boards.cfg
Bin Meng [Mon, 28 Oct 2019 14:24:59 +0000 (07:24 -0700)]
tools: buildman: Honor output directory when generating boards.cfg

buildman always generates boards.cfg in the U-Boot source tree.
When '-o' is given, we should generate boards.cfg to the given
output directory.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoAdd Microsoft Azure Pipelines configuration
Bin Meng [Sun, 27 Oct 2019 12:19:48 +0000 (05:19 -0700)]
Add Microsoft Azure Pipelines configuration

Microsoft Azure Pipelines [1] provides unlimited CI/CD minutes and
10 parallel jobs to every open source project for free.

This adds a configuration file for Azure Pipelines to utilize the
free Windows VM hosted by Microsoft to ensure no build broken in
building U-Boot host tools for Windows.

[1] https://azure.microsoft.com/en-us/blog/announcing-azure-pipelines-with-unlimited-ci-cd-minutes-for-open-source/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agotools: Avoid creating symbolic links for tools/version.h
Bin Meng [Sun, 27 Oct 2019 12:19:47 +0000 (05:19 -0700)]
tools: Avoid creating symbolic links for tools/version.h

When building U-Boot host tools for Windows from Microsoft Azure
Pipelines, the following errors were seen:

  HOSTCC  tools/mkenvimage.o
  In file included from tools/mkenvimage.c:25:
  ./tools/version.h:1:1: error: expected identifier or ‘(’ before ‘.’ token
     1 | ../include/version.h
       | ^
  tools/mkenvimage.c: In function ‘main’:
  tools/mkenvimage.c:117:4: warning: implicit declaration of function ‘usage’ [-Wimplicit-function-declaration]
   117 |    usage(prg);
       |    ^~~~~
  tools/mkenvimage.c:120:35: error: ‘PLAIN_VERSION’ undeclared (first use in this function)
   120 |    printf("%s version %s\n", prg, PLAIN_VERSION);
       |                                   ^~~~~~~~~~~~~
  tools/mkenvimage.c:120:35: note: each undeclared identifier is reported only once for each function it appears in
  make[2]: *** [scripts/Makefile.host:114: tools/mkenvimage.o] Error 1

It turns out tools/version.h is a symbolic link and with Windows
default settings it is unsupported hence the actual content of
tools/version.h is not what file include/version.h has, but the
the linked file path, which breaks the build.

To fix this, remove the symbolic links for tools/version.h. Instead
we perform a copy from include/version.h during the build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agoAdd .gitattributes for line endings
Bin Meng [Sun, 27 Oct 2019 12:19:46 +0000 (05:19 -0700)]
Add .gitattributes for line endings

When building U-Boot host tools for Windows from Microsoft Azure
Pipelines, we see tons of weird warnings and errors emitted from
every Kconfig files:

  Kconfig:6:warning: ignoring unsupported character ''
  Kconfig:6:warning: ignoring unsupported character ''
  Kconfig:8:warning: ignoring unsupported character ''
  Kconfig:9:warning: ignoring unsupported character ''
  Kconfig:10:warning: ignoring unsupported character ''
  Kconfig:10:warning: ignoring unsupported character ''
  Kconfig:13:warning: ignoring unsupported character ''
  arch/Kconfig:1:warning: ignoring unsupported character ''
  arch/Kconfig:2:warning: ignoring unsupported character ''
  arch/Kconfig:2:warning: ignoring unsupported character ''
  arch/Kconfig:4:warning: ignoring unsupported character ''
  ...

After several rounds of experiments, it turns out this is caused
by line endings. Historically, Linux and macOS used linefeed (LF)
characters while Windows used a carriage return plus a linefeed
(CRLF). When Azure Pipelines checks out the U-Boot repo, Git tries
to compensate for the difference by automatically making lines end
in CRLF in the working directory on Windows, which confuses the
Kconfig file parsing logic.

Fortunately Git provides a way for repos to tell Git not to do such
automatical line endings conversion via .gitattributes file below:

* text eol=lf

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agodoc: Add documentation for how to build U-Boot host tools
Bin Meng [Sun, 27 Oct 2019 12:19:45 +0000 (05:19 -0700)]
doc: Add documentation for how to build U-Boot host tools

This adds a reST document for how to build U-Boot host tools,
including information for both Linux and Windows.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agotools: ifwitool: Define __packed when it is not defined
Bin Meng [Sun, 27 Oct 2019 12:19:44 +0000 (05:19 -0700)]
tools: ifwitool: Define __packed when it is not defined

Some compilers may provide __packed define for us.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agolinux/types.h: Surround 'struct ustat' with __linux__
Bin Meng [Sun, 27 Oct 2019 12:19:43 +0000 (05:19 -0700)]
linux/types.h: Surround 'struct ustat' with __linux__

'struct ustat' uses linux-specific typedefs to declare its memebers:
__kernel_daddr_t and __kernel_ino_t. It is currently not used by any
U-Boot codes, but when we build U-Boot tools for other platform like
Windows, this becomes a problem.

Let's surround it with __linux__.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agotools: zynqmpbif: Use compiler builtin instead of linux-specific __swab32
Bin Meng [Sun, 27 Oct 2019 12:19:42 +0000 (05:19 -0700)]
tools: zynqmpbif: Use compiler builtin instead of linux-specific __swab32

__swab32() is a Linux specific macro defined in linux/swab.h. Let's
use the compiler equivalent builtin function __builtin_bswap32() for
better portability.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agotools: mtk_image.h: Use portable uintXX_t instead of linux-specific __leXX
Bin Meng [Sun, 27 Oct 2019 12:19:41 +0000 (05:19 -0700)]
tools: mtk_image.h: Use portable uintXX_t instead of linux-specific __leXX

__leXX has Linux kernel specific __attribute__((bitwise)) which is
not portable. Use corresponding uintXX_t instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agotools: image.h: Use portable uint32_t instead of linux-specific __be32
Bin Meng [Sun, 27 Oct 2019 12:19:40 +0000 (05:19 -0700)]
tools: image.h: Use portable uint32_t instead of linux-specific __be32

__be32 has Linux kernel specific __attribute__((bitwise)) which is
not portable. Use uint32_t instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agoMerge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips
Tom Rini [Sat, 26 Oct 2019 00:07:24 +0000 (20:07 -0400)]
Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips

- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC

2 years agoMerge branch '2019-10-24-ti-imports'
Tom Rini [Fri, 25 Oct 2019 21:33:28 +0000 (17:33 -0400)]
Merge branch '2019-10-24-ti-imports'

- Enable DFU on dra7xx boards
- Further Keystone 3 platform improvements

2 years agoarm: dts: k3-am65: Add R5F ranges in interconnect nodes
Suman Anna [Thu, 17 Oct 2019 03:33:08 +0000 (09:03 +0530)]
arm: dts: k3-am65: Add R5F ranges in interconnect nodes

Add the address spaces for the R5F cores in MCU domain to the ranges
property of the cbass_mcu interconnect node so that the addresses
within the R5F nodes can be translated properly by the relevant OF
address API.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agoarmv7R: K3: j721e: Add support for triggering ddr init from SPL
Lokesh Vutla [Mon, 7 Oct 2019 13:56:38 +0000 (19:26 +0530)]
armv7R: K3: j721e: Add support for triggering ddr init from SPL

In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agoarm: dts: k3-j721e: Add ddr node
Lokesh Vutla [Mon, 7 Oct 2019 13:56:37 +0000 (19:26 +0530)]
arm: dts: k3-j721e: Add ddr node

Use the 3733MTs DDR configuration that is auto generated from
DDR_Regconfig tool.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2 years agoram: k3-j721e: Add support for J721E DDR controller
Kevin Scholz [Mon, 7 Oct 2019 13:56:36 +0000 (19:26 +0530)]
ram: k3-j721e: Add support for J721E DDR controller

The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper
logic to integrate these blocks in the device. The DDR subsystem is
used to provide an interface to external SDRAM devices which can be
utilized for storing program or data. Introduce support for the
DDR controller and DDR phy within the DDR subsystem.

Signed-off-by: Kevin Scholz <k-scholz@ti.com
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agodt-bindings: memory-controller: Introduce J721E DDRSS bindings
Lokesh Vutla [Mon, 7 Oct 2019 13:56:35 +0000 (19:26 +0530)]
dt-bindings: memory-controller: Introduce J721E DDRSS bindings

Add DT binding documentation for DDR sub system present on J721E device.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agoram: k3-am654: Do not rely on default values for certain DDR register
James Doublesin [Mon, 7 Oct 2019 08:34:27 +0000 (14:04 +0530)]
ram: k3-am654: Do not rely on default values for certain DDR register

Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.

Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that same register). Also update the dts files in the same
patch to maintain git bisectability.

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agoram: k3-am654: add support for LPDDR4 and DDR3L DDRs
James Doublesin [Mon, 7 Oct 2019 08:34:26 +0000 (14:04 +0530)]
ram: k3-am654: add support for LPDDR4 and DDR3L DDRs

Added training support for LPDDR4 and DDR3L DDRs.  Also added/changed
some register configuration to support all 3 DDR types

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agoarmv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename
James Doublesin [Mon, 7 Oct 2019 08:34:25 +0000 (14:04 +0530)]
armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename

The current configuration of DDR on AM654 base board is for 1600MTs but
the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
Since 1600MHz is misleading, rename it to
k3-am654-base-board-ddr4-1600MTs.dtsi

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agoarm: K3: Clean and invalidate Linux Image before jumping to Linux
Lokesh Vutla [Mon, 7 Oct 2019 08:22:17 +0000 (13:52 +0530)]
arm: K3: Clean and invalidate Linux Image before jumping to Linux

U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
by set/way in cleanup_before_linux(). Additionally there is a custom
hook provided to clean and invalidate L3 cache.

Unfortunately on K3 devices(having a coherent architecture), there is no
easy way to quickly clean all the cache lines for L3. The entire address
range needs to be cleaned and invalidated by Virtual Address. This can
be implemented using the L3 custom hook but it take lot of time to clean
the entire address range. In the interest of boot time this might not be
a viable solution.

The best hit is to make sure the loaded Linux image is flushed so that
the entire image is written to DDR from L3. When Linux starts running with
caches disabled the full image is available from DDR.

Reported-by: Andrew F. Davis <afd@ti.com>
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agocmd: booti: Store OS start and end info in images structure
Lokesh Vutla [Mon, 7 Oct 2019 08:22:16 +0000 (13:52 +0530)]
cmd: booti: Store OS start and end info in images structure

Store the start and end of the OS image that is loaded in images
structure.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agoboot: arm: Enable support for custom board_prep_linux
Lokesh Vutla [Mon, 7 Oct 2019 08:22:15 +0000 (13:52 +0530)]
boot: arm: Enable support for custom board_prep_linux

Once the arch specific boot_prepare_linux completes, boards wants to
have a custom preparation for linux. Add support for a custom
board_prep_linux.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2 years agoconfigs: dra7xx_evm: Increase the size of SPL_MULTI_DTB_FIT
Faiz Abbas [Wed, 9 Oct 2019 10:35:20 +0000 (12:35 +0200)]
configs: dra7xx_evm: Increase the size of SPL_MULTI_DTB_FIT

Expand SPL_MULTI_DTB_FIT to accommodate usb peripheral nodes being
added to support SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2 years agoconfigs: dra7xx_evm: Add Kconfigs for SPL_DFU bootmode
Faiz Abbas [Wed, 9 Oct 2019 10:35:19 +0000 (12:35 +0200)]
configs: dra7xx_evm: Add Kconfigs for SPL_DFU bootmode

Enable configs for supporting SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2 years agoARM: dts: dra7: Add usb peripheral nodes in spl
Faiz Abbas [Wed, 9 Oct 2019 10:35:18 +0000 (12:35 +0200)]
ARM: dts: dra7: Add usb peripheral nodes in spl

Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Fri, 25 Oct 2019 17:50:51 +0000 (13:50 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

- DWC3 improvements
- i.MX7 EHCI bugfix

2 years agoMerge tag 'u-boot-atmel-2020.01-b' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Fri, 25 Oct 2019 17:50:33 +0000 (13:50 -0400)]
Merge tag 'u-boot-atmel-2020.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel features and fixes for 2020.01 cycle

This feature set includes Eugen's work on a new tiny flexcom driver and
eeprom mac retrieval for the sam9x60-ek board.

2 years agoMerge tag 'xilinx-for-v2020.01-part2' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Fri, 25 Oct 2019 15:23:46 +0000 (11:23 -0400)]
Merge tag 'xilinx-for-v2020.01-part2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.01 part 2

common:
- Fix manual relocation for repeatable commands

arm:
- Also clean up generated dtbos

microblaze:
- Add support for Manual relocation in crypto framework
- Tune and align architecture bootm support

zynq:
- DT sync ups
- Some defconfig updates
- Remove empty board_early_init_f()

zynqmp:
- Clean firmware handing via drivers/firmware/
- DT/defconfig name alignments
- DT cleanups with using firmware based clock driver
- Some defconfig updates
- Add IIO ina226 DT description
- Tune zynqmp_psu_init_minimalize.sh script
- Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216

versal:
- Clean firmware handing via drivers/firmware/
- Add gpio support
- Enable DT overlay/USB/CLK/FPGA
- DT updates
- Tune mini configuration

spi:
- gqspi - Remove unused headers

2 years agoconfigs: mtmips: remove configs which are selected in Kconfig or useless
Weijie Gao [Wed, 25 Sep 2019 09:45:44 +0000 (17:45 +0800)]
configs: mtmips: remove configs which are selected in Kconfig or useless

Some configs are selected in Kconfig and is no longer needed in the
defconfig files. Some configs (power domain, ram) are never used.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agomips: mtmips: select essential drivers in Kconfig
Weijie Gao [Wed, 25 Sep 2019 09:45:43 +0000 (17:45 +0800)]
mips: mtmips: select essential drivers in Kconfig

Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the
system, they should be always selected.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agomips: mtmips: change baudrate table for all boards
Weijie Gao [Wed, 25 Sep 2019 09:45:42 +0000 (17:45 +0800)]
mips: mtmips: change baudrate table for all boards

This patch changes baudrate table for all boards preparing for using mtk
highspeed uart driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: add default pinctrl to eth nodes for all boards
Weijie Gao [Wed, 25 Sep 2019 09:45:41 +0000 (17:45 +0800)]
dts: mtmips: add default pinctrl to eth nodes for all boards

This patch adds default eth pinctrl for all boards.

There are two pinctrl nodes used for two scenarios:
ephy_iot_mode    - for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688
Weijie Gao [Wed, 25 Sep 2019 09:45:40 +0000 (17:45 +0800)]
dts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688

This adds default pinctrl (dual SPI chip select) for gardena smart gateway

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: add mmc related nodes for mt7628an.dtsi
Weijie Gao [Wed, 25 Sep 2019 09:45:39 +0000 (17:45 +0800)]
dts: mtmips: add mmc related nodes for mt7628an.dtsi

This patch adds mmc related nodes for mt7628an.dtsi

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agommc: mtk-sd: add a dts property cd-active-high for builtin-cd mode
Weijie Gao [Wed, 25 Sep 2019 09:45:38 +0000 (17:45 +0800)]
mmc: mtk-sd: add a dts property cd-active-high for builtin-cd mode

This patch adds a dts property cd-active-high for builtin-cd mode to make
it configurable instead of using hardcoded active-low.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agommc: mtk-sd: add support for MediaTek MT7620/MT7628 SoCs
Weijie Gao [Wed, 25 Sep 2019 09:45:37 +0000 (17:45 +0800)]
mmc: mtk-sd: add support for MediaTek MT7620/MT7628 SoCs

This patch adds mmc support for MediaTek MT7620/MT7628 SoCs.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: enable eth port0 led and link poll functions for all boards
Weijie Gao [Wed, 25 Sep 2019 09:45:36 +0000 (17:45 +0800)]
dts: mtmips: enable eth port0 led and link poll functions for all boards

This patch adds default p0led status and phy0 link polling for all boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agonet: mt7628-eth: add support to isolate LAN/WAN ports
Weijie Gao [Wed, 25 Sep 2019 09:45:35 +0000 (17:45 +0800)]
net: mt7628-eth: add support to isolate LAN/WAN ports

This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
prevent LAN devices from getting IP address from WAN.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agonet: mt7628-eth: free rx descriptor on receiving failure
Weijie Gao [Wed, 25 Sep 2019 09:45:34 +0000 (17:45 +0800)]
net: mt7628-eth: free rx descriptor on receiving failure

When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.

This patch adds a call to mt7628_eth_free_pkt() after received an invalid
packet length.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agonet: mt7628-eth: make phy link up detection optional via DT
Weijie Gao [Wed, 25 Sep 2019 09:45:33 +0000 (17:45 +0800)]
net: mt7628-eth: make phy link up detection optional via DT

The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.

This patch rewrites it and makes it optional. It can be turned on by adding
mediatek,poll-link-phy = <?> explicitly into the eth node. By default the
driver is switch mode with all 5 phy ports working without link detection.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agonet: mt7628-eth: remove hardcoded gpio settings and regmap-based phy reset
Weijie Gao [Wed, 25 Sep 2019 09:45:32 +0000 (17:45 +0800)]
net: mt7628-eth: remove hardcoded gpio settings and regmap-based phy reset

This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agophy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 part
Weijie Gao [Wed, 25 Sep 2019 09:45:31 +0000 (17:45 +0800)]
phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 part

This patch adds slew rate calibration for mt76x8-usb-phy, removes code
which belongs to mt7620, and gets rid of using syscon and regmap by using
clock driver and reset controller.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: update reset controller node for mt7628
Weijie Gao [Wed, 25 Sep 2019 09:45:30 +0000 (17:45 +0800)]
dts: mtmips: update reset controller node for mt7628

This patch updates reset controller node for mt7628

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agoreset: add reset controller driver for MediaTek MIPS platform
Weijie Gao [Wed, 25 Sep 2019 09:45:29 +0000 (17:45 +0800)]
reset: add reset controller driver for MediaTek MIPS platform

This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: add default pinctrl for uart nodes
Weijie Gao [Wed, 25 Sep 2019 09:45:28 +0000 (17:45 +0800)]
dts: mtmips: add default pinctrl for uart nodes

This patch adds default pinctrl for uart nodes

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: add pinctrl node for mt7628
Weijie Gao [Wed, 25 Sep 2019 09:45:27 +0000 (17:45 +0800)]
dts: mtmips: add pinctrl node for mt7628

This patch adds pinctrl node with default pin state for mt7628an.dtsi.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agopinctrl: add support for MediaTek MT7628
Weijie Gao [Wed, 25 Sep 2019 09:45:26 +0000 (17:45 +0800)]
pinctrl: add support for MediaTek MT7628

This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agospi: mt7621-spi: restore default register value after each xfer
Weijie Gao [Wed, 25 Sep 2019 09:45:25 +0000 (17:45 +0800)]
spi: mt7621-spi: restore default register value after each xfer

Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.

This patch lets the mt7621_spi_set_cs() restore the original register
fields after cs deactivated.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agospi: mt7621-spi: remove data cache and rewrite its xfer function
Weijie Gao [Wed, 25 Sep 2019 09:45:24 +0000 (17:45 +0800)]
spi: mt7621-spi: remove data cache and rewrite its xfer function

The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.

To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR and DIDO registers is OPADDR has a reversed byte
order.

With this patch, any amount of data can be read/written in a single xfer
function call.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agospi: mt7621-spi: use clock frequency from clk driver
Weijie Gao [Wed, 25 Sep 2019 09:45:23 +0000 (17:45 +0800)]
spi: mt7621-spi: use clock frequency from clk driver

This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: add clock node for mt7628
Weijie Gao [Wed, 25 Sep 2019 09:45:22 +0000 (17:45 +0800)]
dts: mtmips: add clock node for mt7628

This patch adds clkctrl node for mt7628 and adds clocks property for
some node.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agoclk: add clock driver for MediaTek MT76x8 platform
Weijie Gao [Wed, 25 Sep 2019 09:45:21 +0000 (17:45 +0800)]
clk: add clock driver for MediaTek MT76x8 platform

This patch adds a clock driver for MediaTek MT7628/7688 SoC.
It provides clock gate control as well as getting clock frequency for
CPU/SYS/XTAL and some peripherals.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: enable high-speed UART support for mt7628
Weijie Gao [Wed, 25 Sep 2019 09:45:20 +0000 (17:45 +0800)]
dts: mtmips: enable high-speed UART support for mt7628

All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.

Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodts: mtmips: move uart property clock-frequency into mt7628an.dtsi
Weijie Gao [Wed, 25 Sep 2019 09:45:19 +0000 (17:45 +0800)]
dts: mtmips: move uart property clock-frequency into mt7628an.dtsi

The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agoserial: serial_mtk: add non-DM version for SPL
Weijie Gao [Wed, 25 Sep 2019 09:45:18 +0000 (17:45 +0800)]
serial: serial_mtk: add non-DM version for SPL

This patch adds non-DM version for mtk hsuart driver and makes it
compatible with ns16550a driver in configuration.
This is needed in SPL with CONFIG_SPL_DM disabled for reducing size.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agoserial: serial_mtk: enable FIFO and disable flow control
Weijie Gao [Wed, 25 Sep 2019 09:45:17 +0000 (17:45 +0800)]
serial: serial_mtk: enable FIFO and disable flow control

This patch adds codes to enable FIFO and disable flow control taken from
ns16550 driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2 years agodrivers: nand: brcmnand: fix nand_chip ecc layout structure
William Zhang [Wed, 4 Sep 2019 17:51:13 +0000 (10:51 -0700)]
drivers: nand: brcmnand: fix nand_chip ecc layout structure

The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
old kernel which does not use this new API and expect nand_chip.ecc.layout
structure to be set. This cause nand_scan_tail function running into a bug
check if the device has a different oob size than the default ones.

This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
that supports the ecc layout struture and replaces the mtd_set_ooblayout
method

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2 years agomips: bmips: switch to board defines for dtb
Álvaro Fernández Rojas [Mon, 16 Sep 2019 15:15:05 +0000 (17:15 +0200)]
mips: bmips: switch to board defines for dtb

Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2 years agobmips: correct name characters
Álvaro Fernández Rojas [Fri, 30 Aug 2019 10:00:42 +0000 (12:00 +0200)]
bmips: correct name characters

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2 years agobmips: configs: switch to size definitions
Álvaro Fernández Rojas [Fri, 30 Aug 2019 09:54:27 +0000 (11:54 +0200)]
bmips: configs: switch to size definitions

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2 years agomips: bmips: remove unneeded definitions
Álvaro Fernández Rojas [Fri, 30 Aug 2019 09:52:59 +0000 (11:52 +0200)]
mips: bmips: remove unneeded definitions

These are no longer needed.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2 years agobmips: enable vr-3032u nand support
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:20 +0000 (19:12 +0200)]
bmips: enable vr-3032u nand support

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2 years agobmips: bcm63268: add support for brcmnand
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:19 +0000 (19:12 +0200)]
bmips: bcm63268: add support for brcmnand

BCM63268 uses 4.0 HW nand controller, which is currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2 years agobmips: bcm6362: add support for brcmnand
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:18 +0000 (19:12 +0200)]
bmips: bcm6362: add support for brcmnand

BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2 years agobmips: bcm6328: add support for brcmnand
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:17 +0000 (19:12 +0200)]
bmips: bcm6328: add support for brcmnand

BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2 years agobmips: bcm6368: add support for brcmnand
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:16 +0000 (19:12 +0200)]
bmips: bcm6368: add support for brcmnand

BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2 years agonand: brcm: add BCM6368 support
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:15 +0000 (19:12 +0200)]
nand: brcm: add BCM6368 support

This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2 years agoMIPS: add compile time definition of L2 cache size
Ramon Fried [Mon, 10 Jun 2019 18:05:26 +0000 (21:05 +0300)]
MIPS: add compile time definition of L2 cache size

If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2 years agosunxi: set PIO voltage to hardware-detected value on startup on H6
Icenowy Zheng [Wed, 24 Apr 2019 05:44:12 +0000 (13:44 +0800)]
sunxi: set PIO voltage to hardware-detected value on startup on H6

The Allwinner H6 SoC has a register to set the PIO banks' voltage. When
it mismatches the real voltage supplied to the VCC to the PIO supply,
the PIO will work improperly.

The PIO controller also has a register that contains the status of each
VCC rail of the PIO supplies, and it has the same definition with the
configuration register. so we can just copy the content of this register
to the configuration register at startup, to ensure the configuration is
correct at startup stage.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[jagan: s/__maybe__unused/__maybe_unused]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoarm: dts: sync dts for Allwinner H6
Clément Péron [Sun, 25 Aug 2019 16:04:18 +0000 (18:04 +0200)]
arm: dts: sync dts for Allwinner H6

Sync Kernel DTS for Allwinner H6 boards.

Drop /omit-if-no-ref/ keyword as it's not supported by U-boot.

commit <d45331b00ddb> Linux 5.3-rc4

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agosunxi: Fix pll1 clock calculation
Stefan Mavrodiev [Wed, 31 Jul 2019 13:15:52 +0000 (16:15 +0300)]
sunxi: Fix pll1 clock calculation

clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families.
PLL1 clock sets the default system clock, defined as:
  sun6i: 1008000000
  sun8i: 1008000000
  sun50i: 816000000

With the current calculation, m = 2 and k = 3. Solving for n,
this results 28. Solving back:
  (24MHz * 28 * 3) / 2 = 1008MHz

However if the requested clock is 816, n is 22.66 rounded
to 22, which results:
  (24MHz * 28 * 3) / 2 = 792MHz

Changing k to 4 satisfies both system clocks:
  (24E6 * 21 * 4) / 2 = 1008MHz
  (24E6 * 17 * 4) / 2 = 816MHz

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoarm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)
Sunil Mohan Adapa [Tue, 10 Sep 2019 18:43:40 +0000 (11:43 -0700)]
arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

commit <02bb66b347ff8115f53948f86b884e008ba385b9> ("arm64: dts:
allwinner: a64: Add A64 OlinuXino board (with eMMC)")

This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree and a64-olinuxino_defconfig.

Signed-off-by: Sunil Mohan Adapa <sunil@medhas.org>
[jagan: updated linux-next commit details]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agosunxi: H6: DRAM: Add support for half DQ
Jernej Skrabec [Fri, 23 Aug 2019 17:24:04 +0000 (19:24 +0200)]
sunxi: H6: DRAM: Add support for half DQ

Half DQ configuration seems to be very rare for H6 based boards/STBs,
but exists nevertheless. Currently the only known product which needs
this support is Tanix TX6 mini.

This commit adds support for half DQ configuration. Code was tested
for regressions on other configurations (OrangePi 3 1 GiB/LPDDR3, Tanix
TX6 4 GiB/DDR3) and none were found.

Thanks to Icenowy Zheng for help with this code.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: thomas graichen <thomas.graichen@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
2 years agospi-nor-ids: Add support for Adesto AT25SL321
Fabio Estevam [Mon, 21 Oct 2019 13:51:16 +0000 (10:51 -0300)]
spi-nor-ids: Add support for Adesto AT25SL321

Add an entry for the Adesto AT25SL321 SPI NOR chip.

This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTD
Frieder Schrempf [Wed, 23 Oct 2019 07:41:20 +0000 (07:41 +0000)]
mtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTD

Most boards currently use SPI_FLASH_MTD only in U-Boot proper, not in
SPL. They often rely on hacks in the board header files to include
this option conditionally. To be able to fix this, we previously
introduced a separate option SPL_SPI_FLASH_MTD.

Therefore we can now adjust the Makefile and change the code in
sf_probe.c and sf_internal.h to use CONFIG_IS_ENABLED(SPI_FLASH_MTD).

We also need to move all occurences of CONFIG_SPI_FLASH_MTD from the
header files to the according defconfigs. The affected boards are
socfpga, aristainetos, cm_fx6, display5, ventana, rcar-gen2, dh_imx6
and da850evm.

We do this all in one patch to guarantee bisectibility.

This change was tested with buildman to make sure it does not
introduce any regressions by comparing the resulting binary sizes.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agospi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entry
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:20 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entry

n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status
register that indicates various errors that may be encountered during
erase/write operations. Therefore add USE_FSR flag wherever missing.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agospi-nor: spi-nor-ids: Add entries for mt25q variants
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:19 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Add entries for mt25q variants

mt25q* flashes support stateless 4 byte addressing opcodes. Add entries
for the same. These flashes have bit 6 set in 5th byte of READ ID
response when compared to n25q* variants.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agospi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:18 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*

Per datasheets of n25q256* and n25q512* not all variants of n25q256* and
n25q512* support 4 Byte stateless addressing opcodes. Therefore drop
SPI_NOR_4B_OPCODES flag from these entries

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agospi: designware_spi: Disable and free clock when remove driver
Ley Foon Tan [Wed, 19 Sep 2018 08:27:19 +0000 (16:27 +0800)]
spi: designware_spi: Disable and free clock when remove driver

Disable and free clock when remove driver.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with SPI_FLASH_USE_4K_SECTORS
Vignesh Raghavendra [Thu, 26 Sep 2019 13:34:27 +0000 (19:04 +0530)]
mtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with SPI_FLASH_USE_4K_SECTORS

U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector
support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS.

Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-core: Use dev_err for reporting erase/write failures
Vignesh Raghavendra [Thu, 26 Sep 2019 13:34:26 +0000 (19:04 +0530)]
mtd: spi-nor-core: Use dev_err for reporting erase/write failures

Use dev_err() when reporting reason for erase/write failures so that
users can be made aware of the reason for failure.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agostm32mp1: configs: Add CONFIG_SPL_SPI_FLASH_MTD
Frieder Schrempf [Tue, 22 Oct 2019 18:07:43 +0000 (23:37 +0530)]
stm32mp1: configs: Add CONFIG_SPL_SPI_FLASH_MTD

As SPI_FLASH_MTD is used in SPL and U-Boot proper, we enable both,
now that a separate option for SPL was introduced.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
[jagan: drop unrelated change]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi: Add a new option SPL_SPI_FLASH_MTD to Kconfig
Frieder Schrempf [Fri, 13 Sep 2019 22:43:42 +0000 (22:43 +0000)]
mtd: spi: Add a new option SPL_SPI_FLASH_MTD to Kconfig

To allow SPI_FLASH_MTD being enabled separately in SPL we add a new
option. The only user currently is the stm32mp15_basic board.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoconfigs: sopine-baseboard: Enable SPI-FLASH
Jagan Teki [Wed, 16 Oct 2019 13:49:25 +0000 (19:19 +0530)]
configs: sopine-baseboard: Enable SPI-FLASH

SoPine has winbond SPI-FLASH, so enable the same in defconfig
and add aliases for spi0 in -u-boot.dtsi

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoarm: sunxi: Enable SPI/SPI-FLASH support for A64
Jagan Teki [Wed, 16 Oct 2019 12:38:26 +0000 (18:08 +0530)]
arm: sunxi: Enable SPI/SPI-FLASH support for A64

SPI is available in Allwinner A64 SoC, so enable it
globally in Kconfig.

- CONFIG_SPI
- CONFIG_DM_SPI
- CONFIG_DM_SPI_FLASH

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agospi: Kconfig: Enable SPI_SUNXI for SUNXI
Jagan Teki [Wed, 16 Oct 2019 12:35:56 +0000 (18:05 +0530)]
spi: Kconfig: Enable SPI_SUNXI for SUNXI

SPI_SUNXI driver is fully dm-aware and the Allwinner
architecture kconfig would have logic to enable the
DM_SPI. So, select default spi sunxi driver for
sunxi architecture.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi: Kconfig: Imply SPI_FLASH if DM_SPI_FLASH
Jagan Teki [Wed, 16 Oct 2019 12:37:24 +0000 (18:07 +0530)]
mtd: spi: Kconfig: Imply SPI_FLASH if DM_SPI_FLASH

DM_SPI_FLASH should require spi flash interface code for dm
version, so imply SPI_FLASH core by default if any board
enabled DM_SPI_FLASH.

This overcome the explicit enablement of CONFIG_SPI_FLASH on
respective boards when DM_SPI_FLASH being used.

Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agocmd: sf: Mark it default if DM_SPI_FLASH enabled
Jagan Teki [Wed, 16 Oct 2019 12:29:42 +0000 (17:59 +0530)]
cmd: sf: Mark it default if DM_SPI_FLASH enabled

If DM_SPI_FLASH enabled that means it is using sf command
for flash interface to access.

SPI_FLASH can be used via sf command and board/driver
functions to call spi flash ops, so mark it default only
for DM_SPI_FLASH.

This would prevent explicit adding of CONFIG_CMD_SF when
DM_SPI_FLASH being enabled.

Cc: Tom Rini <trini@konsulko.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agodm: spi: Change cs_info op to return -EINVAL for invalid cs num
Bin Meng [Mon, 9 Sep 2019 13:00:01 +0000 (06:00 -0700)]
dm: spi: Change cs_info op to return -EINVAL for invalid cs num

We need distinguish the following two situations in various SPI APIs:

- given chip select num is invalid
- given chip select num is valid, but no device is attached

Currently -ENODEV is returned for both cases.

For the first case, it's more reasonable to return -EINVAL instead of
-ENODEV for invalid chip select numbers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agodm: spi: Return 0 if driver does not implement ops->cs_info
Bin Meng [Mon, 9 Sep 2019 13:00:00 +0000 (06:00 -0700)]
dm: spi: Return 0 if driver does not implement ops->cs_info

If an SPI controller driver does not implement ops->cs_info, that
probably means any chip select number could be valid, hence let's
return 0 for spi_cs_info().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agospi: Kconfig: Add help text
Jagan Teki [Wed, 16 Oct 2019 12:34:13 +0000 (18:04 +0530)]
spi: Kconfig: Add help text

Add detailed help text for SPI support.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor: ids: Add is25wp256 chip
Jagan Teki [Sun, 29 Sep 2019 07:42:37 +0000 (13:12 +0530)]
mtd: spi-nor: ids: Add is25wp256 chip

Add is25wp256, chip to spi-nor id table.

Tested on SiFive FU540 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2 years agomtd: spi: Kconfig: Update CONFIG_SPI_FLASH
Jagan Teki [Sat, 9 Feb 2019 12:15:42 +0000 (17:45 +0530)]
mtd: spi: Kconfig: Update CONFIG_SPI_FLASH

1) CONFIG_SPI_FLASH is not just a legacy code, but it has common
   core code which handle both dm and non-dm spi flash code. So
   fix the info text to make it clear globally.

2) Since it's flash core it shouldn't depends on legacy SPI,
   so remove the 'depends on SPI'

Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>