oweals/u-boot.git
18 months agoMerge branch 'master' of git://git.denx.de/u-boot
Stefano Babic [Sun, 10 May 2020 11:03:56 +0000 (13:03 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot

18 months agoMerge branch '2020-05-08-assorted-fixes'
Tom Rini [Fri, 8 May 2020 22:58:19 +0000 (18:58 -0400)]
Merge branch '2020-05-08-assorted-fixes'

18 months agotest: fix naming of test functions in the log test suite
Heinrich Schuchardt [Wed, 6 May 2020 16:26:08 +0000 (18:26 +0200)]
test: fix naming of test functions in the log test suite

Both the nolog as well as the syslog tests were not found by Python
function generate_ut_subtest() due to not following the nameing
requirements imposed by the regular expression used to find linker
generated list entries in file u-boot.sym.

Adjust the naming of test functions.

With the patch the following tests are executed successfully for
sandbox_defconfig:

test/py/tests/test_ut.py::test_ut[ut_log_syslog_debug] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_err] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_info] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_nodebug] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_notice] PASSED
test/py/tests/test_ut.py::test_ut[ut_log_syslog_warning] PASSED

The nolog tests are only executed if CONFIG_LOG=n and
CONFIG_CONSOLE_RECORD=y.

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
18 months agotest: describe naming conventions for macro UNIT_TEST
Heinrich Schuchardt [Wed, 6 May 2020 16:26:07 +0000 (18:26 +0200)]
test: describe naming conventions for macro UNIT_TEST

Strict naming conventions have to be followed for Python function
generate_ut_subtest() to collect C unit tests to be executed via
command 'ut'.

Describe the requirements both on the C as well on the Python side.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agoenv/sf.c: honour CONFIG_SPL_SAVEENV
Rasmus Villemoes [Thu, 26 Mar 2020 23:02:00 +0000 (00:02 +0100)]
env/sf.c: honour CONFIG_SPL_SAVEENV

Deciding whether to compile the env_sf_save() function based solely on
CONFIG_SPL_BUILD is wrong: For U-Boot proper, it leads to a build
warning in case CONFIG_CMD_SAVEENV=n (because the initialization of
the .save member is guarded by CONFIG_CMD_SAVEENV, while the
env_sf_save() function is built if !CONFIG_SPL_BUILD - and even
without the CONFIG_CMD_SAVEENV guard, the env_save_ptr() macro would
just expand to NULL, with no reference to env_sf_save visible to the
compiler). And for SPL, when one selects CONFIG_SPL_SAVEENV, one
obviously expects to actually be able to save the environment.

The compiler warning can be fixed by using a "<something> ?
env_sf_save : NULL" construction instead of a macro that just eats its
argument and expands to NULL. That way, if <something> is false,
env_sf_save gets eliminated as dead code, but the compiler still sees
the reference to it.

For <something>, we can use CONFIG_IS_ENABLED(SAVEENV), which is true
precisely:

- For U-Boot proper, when CONFIG_CMD_SAVEENV is set (because
  CONFIG_SAVEENV is a hidden config symbol that gets set if and only
  if CONFIG_CMD_SAVEENV is set).
- For SPL, when CONFIG_SPL_SAVEENV is set.

As a bonus, this also removes quite a few preprocessor conditionals.

This has been run-time tested on a mpc8309-derived board to verify
that saving the environment does indeed work in SPL with these patches
applied.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
18 months agosata: dwc_ahsata: Fix memory issue in reset_sata
Ye Li [Sun, 3 May 2020 14:27:03 +0000 (22:27 +0800)]
sata: dwc_ahsata: Fix memory issue in reset_sata

The reset_sata should reset the sata device info and free the
probe_ent memory. Otherwise, it will cause memory leak if we
init the sata again.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
18 months agosata: dwc_ahsata: Fix incorrect free
Ye Li [Sun, 3 May 2020 14:27:02 +0000 (22:27 +0800)]
sata: dwc_ahsata: Fix incorrect free

Fix coverity issue CID 43665: Free of address-of expression (BAD_FREE)
incorrect_free: free frees incorrect pointer pp.

pp points the port array field of struct ahci_uc_priv, should not free it.

Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agosata: ahsata: Fix wrong operand for checking SERR DIAG_X
Ye Li [Sun, 3 May 2020 14:27:01 +0000 (22:27 +0800)]
sata: ahsata: Fix wrong operand for checking SERR DIAG_X

Fix coverity issue CID 3261683: Wrong operator used
(CONSTANT_EXPRESSION_RESULT) operator_confusion:
({...; __v;}) | 67108864 is always 1/true regardless of the values
of its operand. This occurs as the logical operand of !

When DIAG_X is set, the PHY COMINIT signal is detected, so
should use '&' to check whether it is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agosata: ahsata: Fix resource leak
Ye Li [Sun, 3 May 2020 14:27:00 +0000 (22:27 +0800)]
sata: ahsata: Fix resource leak

Fix coverity issue CID 3606684: Resource leak (RESOURCE_LEAK)
leaked_storage: Variable uc_priv going out of scope leaks the storage it points to

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoMerge tag 'efi-2020-07-rc2-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Fri, 8 May 2020 18:56:23 +0000 (14:56 -0400)]
Merge tag 'efi-2020-07-rc2-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc2-3

This series contains bug fixes and code simplifications.

Following clarification in the discussion of the EBBR specification
device trees will be passed as EfiACPIReclaimMemory to UEFI applications.

19 months agoMerge branch '2020-05-07-more-kconfig-migrations'
Tom Rini [Fri, 8 May 2020 17:48:37 +0000 (13:48 -0400)]
Merge branch '2020-05-07-more-kconfig-migrations'

- Migrate CONFIG_SET_DFU_ALT_INFO, CONFIG_SYS_MTDPARTS_RUNTIME and
  finish the rest of the memtest related options.

19 months agotreewide: mem: Move mtest related defines to Kconfig
Ashok Reddy Soma [Mon, 4 May 2020 13:26:21 +0000 (15:26 +0200)]
treewide: mem: Move mtest related defines to Kconfig

Move below defines which are used by mtest utility to Kconfig.
CONFIG_SYS_MEMTEST_START
CONFIG_SYS_MEMTEST_END

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Fix kmcoge5ne board, re-run migration as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
19 months agotreewide: mem: Enable MEMTEST via defconfig
Michal Simek [Mon, 4 May 2020 13:26:20 +0000 (15:26 +0200)]
treewide: mem: Enable MEMTEST via defconfig

There is no reason to enable MEMTEST from headers when was converted to
Kconfig already.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
19 months agotreewide: mem: Remove alternate memtest setup from Mox and x530
Michal Simek [Mon, 4 May 2020 13:26:19 +0000 (15:26 +0200)]
treewide: mem: Remove alternate memtest setup from Mox and x530

The commit e89f8aae3d67 ("treewide: Migrate CONFIG_SYS_ALT_MEMTEST to Kconfig")
setup correct dependency on MEMTEST that's why there is no reason to enable
enable alternate memtest without mtest command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
19 months agocmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH mapping
Michal Simek [Mon, 4 May 2020 11:54:40 +0000 (13:54 +0200)]
cmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH mapping

There is no real need to exactly define space for saving patterns for
alternate memory test. It is much easier to allocate space on the stack and
use it instead of trying to find out space where pattern should be saved.

For example if you want to test the whole DDR memory you can't save patter
to DDR and you need to find it out. On Xilinx devices DDR or OCM addresses
were chosen but that means that OCM needs to be mapped and U-Boot has
access permission there.

It is easier to remove this limitation and simply save it on stack because
it is very clear that memory test can't rewrite U-Boot and U-Boot has also
full access to memory where runs from.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
19 months agoconfigs: migrate CONFIG_SYS_MTDPARTS_RUNTIME to defconfigs
Patrick Delaunay [Wed, 26 Feb 2020 09:28:42 +0000 (10:28 +0100)]
configs: migrate CONFIG_SYS_MTDPARTS_RUNTIME to defconfigs

Move CONFIG_SYS_MTDPARTS_RUNTIME into Kconfig done by moveconfig.py.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
19 months agoconfigs: migrate CONFIG_SET_DFU_ALT_INFO to defconfigs
Patrick Delaunay [Wed, 26 Feb 2020 09:28:41 +0000 (10:28 +0100)]
configs: migrate CONFIG_SET_DFU_ALT_INFO to defconfigs

Move CONFIG_SET_DFU_ALT_INFO into Kconfig done by moveconfig.py.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
19 months agoconfigs: Resync with savedefconfig
Tom Rini [Fri, 8 May 2020 13:08:39 +0000 (09:08 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
19 months agoMerge branch '2020-05-07-atheros-phy-improvements'
Tom Rini [Thu, 7 May 2020 18:51:44 +0000 (14:51 -0400)]
Merge branch '2020-05-07-atheros-phy-improvements'

19 months agoefi_loader: crypto/pkcs7_parser.h is not a local include
Heinrich Schuchardt [Thu, 7 May 2020 15:57:43 +0000 (17:57 +0200)]
efi_loader: crypto/pkcs7_parser.h is not a local include

User <> and not "" for referencing a global include.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: pkcs7_parse_message() returns error pointer
Patrick Wildt [Thu, 7 May 2020 00:17:14 +0000 (02:17 +0200)]
efi_loader: pkcs7_parse_message() returns error pointer

Since pkcs7_parse_message() returns an error pointer, we must not
check for NULL.  We have to explicitly set msg to NULL in the error
case, otherwise the call to pkcs7_free_message() on the goto err
path will assume it's a valid object.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Add missing include linux/err.h
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: efi_variable_parse_signature() returns NULL on error
Patrick Wildt [Thu, 7 May 2020 00:13:18 +0000 (02:13 +0200)]
efi_loader: efi_variable_parse_signature() returns NULL on error

efi_variable_parse_signature() returns NULL on error, so IS_ERR()
is an incorrect check.  The goto err leads to pkcs7_free_message(),
which works fine on a NULL ptr.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
19 months agoefi_loader: put device tree into EfiACPIReclaimMemory
Heinrich Schuchardt [Wed, 6 May 2020 18:32:31 +0000 (20:32 +0200)]
efi_loader: put device tree into EfiACPIReclaimMemory

According to the UEFI spec ACPI tables should be placed in
EfiACPIReclaimMemory. Let's do the same with the device tree.

Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Grant Likely <grant.likely@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: use logical and in do_env_print_efi()
Heinrich Schuchardt [Wed, 6 May 2020 00:01:34 +0000 (02:01 +0200)]
efi_loader: use logical and in do_env_print_efi()

If we want to check if two booleans are true, we should use a logical
conjunction (&&) and not a bitwise and-operator (&).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: do not unnecessarily use EFI_CALL()
Heinrich Schuchardt [Tue, 5 May 2020 23:51:04 +0000 (01:51 +0200)]
efi_loader: do not unnecessarily use EFI_CALL()

There is no need to call efi_get_variable() instead of
efi_get_variable_common(). So let's use the internal function.

Move forward declarations to the top of the file.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: error handling in efi_set_variable_common().
Heinrich Schuchardt [Tue, 5 May 2020 23:37:25 +0000 (01:37 +0200)]
efi_loader: error handling in efi_set_variable_common().

Fix unreachable code. Free memory on error.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: remove redundant assignment in dp_fill()
Heinrich Schuchardt [Tue, 5 May 2020 23:28:08 +0000 (01:28 +0200)]
efi_loader: remove redundant assignment in dp_fill()

The value of dp is overwritten without being used.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agokbuild: efi: Avoid rebuilding efi targets
Jan Kiszka [Mon, 4 May 2020 12:38:29 +0000 (14:38 +0200)]
kbuild: efi: Avoid rebuilding efi targets

Add a couple of missing targets so that helloworld and other efi targets
are not needlessly rebuilt.

CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agophy: atheros: consolidate {ar8031|ar8035}_config()
Michael Walle [Wed, 6 May 2020 22:11:59 +0000 (00:11 +0200)]
phy: atheros: consolidate {ar8031|ar8035}_config()

The two functions are now exactly the same, remove one of them.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: ar8035: remove static clock config
Michael Walle [Wed, 6 May 2020 22:11:58 +0000 (00:11 +0200)]
phy: atheros: ar8035: remove static clock config

We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.

If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <125000000>" because that value was the hardcoded
value until this commit.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: add device tree bindings and config
Michael Walle [Wed, 6 May 2020 22:11:57 +0000 (00:11 +0200)]
phy: atheros: add device tree bindings and config

Add support for configuring the CLK_25M pin as well as the RGMII I/O
voltage by the device tree.

By default the AT803x PHYs outputs the 25MHz clock of the XTAL input.
But this output can also be changed by software to other frequencies.
This commit introduces a generic way to configure this output.

Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V.
An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V
option needs an external supply voltage. This commit adds support to
switch the internal LDO to 1.8V.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: move delay config to common function
Michael Walle [Wed, 6 May 2020 22:11:56 +0000 (00:11 +0200)]
phy: atheros: move delay config to common function

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: introduce debug read and write functions
Michael Walle [Wed, 6 May 2020 22:11:55 +0000 (00:11 +0200)]
phy: atheros: introduce debug read and write functions

Provide functions to read and write the Atheros debug registers.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: use defines for PHY IDs
Michael Walle [Wed, 6 May 2020 22:11:54 +0000 (00:11 +0200)]
phy: atheros: use defines for PHY IDs

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: fix AR8021 PHY ID mask
Michael Walle [Wed, 6 May 2020 22:11:53 +0000 (00:11 +0200)]
phy: atheros: fix AR8021 PHY ID mask

The upper bits are all the OUI.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: Clarify the intention of ar8021_config
Vladimir Oltean [Wed, 6 May 2020 22:11:52 +0000 (00:11 +0200)]
phy: atheros: Clarify the intention of ar8021_config

Debug register 5 contains TX_CLK DELAY at bit 8 and reserved values at
the other bit positions, just like the other PHYs in the family do.
Therefore, it is not necessary to hardcode the reserved values, but
instead simply follow the read-modify-write procedure from the common
function.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: Explicitly disable RGMII delays
Vladimir Oltean [Wed, 6 May 2020 22:11:51 +0000 (00:11 +0200)]
phy: atheros: Explicitly disable RGMII delays

To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.

If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: Clarify the configuration of the CLK_25M output pin
Vladimir Oltean [Wed, 6 May 2020 22:11:50 +0000 (00:11 +0200)]
phy: atheros: Clarify the configuration of the CLK_25M output pin

Also take the opportunity to use the phy_read_mmd and phy_write_mmd
convenience functions.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: Use common functions for RGMII internal delays
Vladimir Oltean [Wed, 6 May 2020 22:11:49 +0000 (00:11 +0200)]
phy: atheros: Use common functions for RGMII internal delays

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agophy: atheros: Make RGMII Tx delays actually configurable for AR8035
Vladimir Oltean [Wed, 6 May 2020 22:11:48 +0000 (00:11 +0200)]
phy: atheros: Make RGMII Tx delays actually configurable for AR8035

Delete the extraneous write to debug reg 5 that enables Tx delay

When the driver was originally introduced in commit "6027384a phylib:
Add Atheros AR8035 GETH PHY support", the Tx delay was being
unconditionally enabled.

Then during "2ec4d10b phy: atheros: add support for RGMII_ID, RGMII_TXID
and RGMII_RXID", the author did not notice that code for enabling Tx
delay code was already. Therefore, the if condition for Tx delay has
always been useless for this PHY since this commit introduced it.

Prior to this patch, every AR8035 PHY in U-boot had Tx delay enabled.
After this patch, only those who define the interface as RGMII_TXID or
RGMII_ID will. This is to be expected, but will nonetheless break the
setups of those who didn't know they rely on Tx delay implicitly.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
19 months agoMerge branch '2020-05-06-master-imports'
Tom Rini [Thu, 7 May 2020 13:02:28 +0000 (09:02 -0400)]
Merge branch '2020-05-06-master-imports'

- ARM Juno updates
- Assorted bugfixes

19 months agomenu: add support for client defined statusline function
Thirupathaiah Annapureddy [Wed, 18 Mar 2020 18:38:42 +0000 (11:38 -0700)]
menu: add support for client defined statusline function

Currently displaying status line is done in a weak function
menu_display_statusline().

bootmenu.c overrides the weak default function.
It calls menu_default_choice() and interprets the data as
struct bootmenu_entry.

pxe boot also uses common menu code for pxe menus.
If there is a system that enables both bootmenu and pxe,
menu_display_statusline() defined in bootmenu.c will be called
and it will interpret struct pxe_label as struct bootmenu_entry.
This leads to data aborts and pxe menu corruptions.

This patch adds support for client defined statusline function
to resolve the above bug.

Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
19 months agorsa: fix alignment issue when getting public exponent
Heiko Stuebner [Sun, 3 May 2020 11:26:34 +0000 (13:26 +0200)]
rsa: fix alignment issue when getting public exponent

To fill the exponent field of the rsa_public_key struct, rsa_mod_exp_sw
did a cast to uint64_t of the key_prop->public_exponent field.
But that alignment is not guaranteed in all cases.

This came to light when in my spl-fit-signature the key-name exceeded
a certain length and with it the verification then started failing.
(naming it "integrity" worked fine, "integrity-uboot" failed)

key_prop.public_exponent itself is actually a void-pointer, fdt_getprop()
also just returns such a void-pointer and inside the devicetree the 64bit
exponent is represented as 2 32bit numbers, so assuming a 64bit alignment
can lead to false reads.

So just use the already existing rsa_convert_big_endian() to do the actual
conversion from the dt's big-endian to the needed uint64 value.

Fixes: fc2f4246b4b3 ("rsa: Split the rsa-verify to separate the modular exponentiation")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agocmd: cache: Fix non-cached memory cachability
Patrice Chotard [Tue, 28 Apr 2020 09:38:03 +0000 (11:38 +0200)]
cmd: cache: Fix non-cached memory cachability

If dcache is switched OFF to ON state and if non-cached memory is
used, this non-cached memory must be re-declared as uncached to mmu
each time dcache is set ON.

Introduce noncached_set_region() to set this non-cached region's mmu
settings. Let architecture override it by defining it as a weak
function.

For ARM architecture, noncached_set_region() defines all noncached
region as non-cacheable.

Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver,
when going from dcache OFF to dcache ON state, ethernet driver issued
TX timeout errors when performing dhcp or ping.

It can be reproduced with the following sequence:

dhcp
while true ; do
  ping 192.168.1.300 ;
  dcache off ;
  ping 192.168.1.300 ;
  dcache on ;
done

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
19 months agoarm: vexpress64: Remove unneeded CONFIG_ check
Andre Przywara [Mon, 27 Apr 2020 18:18:04 +0000 (19:18 +0100)]
arm: vexpress64: Remove unneeded CONFIG_ check

CONFIG_SEMIHOSTING is selected for the VFP target by the means of
Kconfig already, there is no need to check this in the header file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoarm: juno: enable USB
Andre Przywara [Mon, 27 Apr 2020 18:18:03 +0000 (19:18 +0100)]
arm: juno: enable USB

The Juno board features a standard compliant EHCI/OHCI USB host
controller pair, which we can just enable.
The platform data is taken from the device tree.

This allows to use USB mass storage (the only storage on a Juno r0)
for loading.

At least on my board USB seems a bit flaky, I need two "usb reset"
sequences after the "usb start" to detect an USB hard drive.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoarm: juno: Use PSCI based reset
Andre Przywara [Mon, 27 Apr 2020 18:18:02 +0000 (19:18 +0100)]
arm: juno: Use PSCI based reset

So far the Juno board wasn't implementing reset. Let's just use the
already existing PSCI_RESET based method to avoid any extra code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoarm: juno: Enable OF_CONTROL
Andre Przywara [Mon, 27 Apr 2020 18:18:01 +0000 (19:18 +0100)]
arm: juno: Enable OF_CONTROL

The Arm Juno board was still somewhat stuck in "hardcoded land", even
though there are stable DTs around, and one happens to actually be on
the memory mapped NOR flash.

Enable the configuration options to let the board use OF_CONTROL, and
add a routine to find the address of the DTB partition in NOR
flash, to use that for U-Boot's own purposes.
This can also passed on via $fdtcontroladdr to any kernel or EFI
application, removing the need to actually load a device tree.

Since the existing "afs" command and its flash routines require
flash_init() to be called before being usable, and this is done much
later in the boot process, we introduce a stripped-down partition finder
routine in vexpress64.c, to scan the NOR flash partitions for the
DT partition. This location is then used for U-Boot to find and probe
devices.

The name of the partition can be configured, if needed, but defaults
to "board.dtb", which is used by Linaro's firmware image provided.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoarm: juno: Fix UART clock rate
Andre Przywara [Mon, 27 Apr 2020 18:18:00 +0000 (19:18 +0100)]
arm: juno: Fix UART clock rate

The UART base clock rate was typo-ed in the header file, probably because
the reference (the Linux .dts) was also wrong[1].

Fix the number to make the baud rate more correct.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=39a1a8941b2
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agouart: pl011: Add proper DM clock support
Andre Przywara [Mon, 27 Apr 2020 18:17:59 +0000 (19:17 +0100)]
uart: pl011: Add proper DM clock support

Even though the PL011 UART driver claims to be DM compliant, it does not
really a good job with parsing DT nodes. U-Boot seems to adhere to a
non-standard binding, either requiring to have a "skip-init" property in
the node, or to have an extra "clock" property holding the base
*frequency* value for the baud rate generator.
DTs in the U-Boot tree seem to have been hacked to match this
requirement.

The official binding does not mention any of these properties, instead
recommends a standard "clocks" property to point to the baud base clock.

Some boards use simple "fixed-clock" providers, which U-Boot readily
supports, so let's add some simple DM clock code to the PL011 driver to
learn the rate of the first clock, as described by the official binding.

These clock nodes seem to be not ready very early in the boot process,
so provide a fallback value, by re-using the already existing
CONFIG_PL011_CLOCK variable.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[trini: Add <clock_legacy.h> for get_bus_freq() for layerscape
platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoarm: juno: Fix Juno address variables
Andre Przywara [Mon, 27 Apr 2020 18:17:58 +0000 (19:17 +0100)]
arm: juno: Fix Juno address variables

The U-Boot documentation explains that variables ending with "_r" hold
addresses in DRAM, while those without that ending point to flash/ROM.
The default variables for the Juno board pointing to the kernel and DTB
load addresses were not complying with this scheme: they lack the
extension, but point to DRAM. This is particularly confusing since the
Juno board features parallel NOR flash, so there *is* a memory mapped
NOR address holding a DTB, for instance.

Fix the variables to use the proper names, changing initrd_addr to
ramdisk_addr_r on the way, which seems to be more prevelant and
documented. On the way adjust the FDT load address to be situated
*before* the kernel, since users happened to overwrite the DTB by the
kernel clearing its .BSS section during initialisation.
Also remove the fdt_high and initrd_high variables (which were set
to -1), to allow U-Boot moving those images around.

This should avoid many problems in the future, but breaks loading
Linux kernels < v4.2, since they expect the DTB to be loaded in the same
512MB region as the kernel. If you need to load such an old kernel,
please set fdt_high to either 0xffffffffffffffff or 0xa0000000 (if you
load the kernel to the beginning of DRAM).

That fixes loading debug kernels, which happened to overwrite the DTB on
certain setups.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoinclude/eeprom.h: fix build errors
Rasmus Villemoes [Tue, 18 Feb 2020 08:39:42 +0000 (08:39 +0000)]
include/eeprom.h: fix build errors

CMD_EEPROM and ENV_IS_IN_EEPROM can be selected independently, and
cmd/eeprom.o gets built in either case, so whether to declare the real
prototypes needs to follow the same logic as whether cmd/eeprom.c is
built. Otherwise a ENV_IS_IN_EEPROM=y, CMD_EEPROM=n build fails

cmd/eeprom.c:73:1: error: expected identifier or ‘(’ before ‘{’ token
 {

While at it, fix the dummy replacements (at least assuming they are
meant to allow the code to compile) - they need to have the same type
as the expression they replace, or one gets errors such as

env/eeprom.c: In function ‘eeprom_bus_read’:
env/eeprom.c:37:8: error: void value not ignored as it ought to be
  rcode = eeprom_read(dev_addr, offset, buffer, cnt);

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
19 months agoRevert "mkimage: fit: Do not tail-pad fitImage with external data"
Tom Rini [Wed, 6 May 2020 15:05:17 +0000 (11:05 -0400)]
Revert "mkimage: fit: Do not tail-pad fitImage with external data"

This has been reported to break booting of U-Boot from SPL on a number
of platforms due to a lack of alignment of the external data.  The
issues this commit is addressing will need to be resolved another way.

Re-introduce a data leak in the padding for now.

This reverts commit 20a154f95bfe0a3b5bfba90bea7f001c58217536.

Reported-by: Alex Kiernan <alex.kiernan@gmail.com>
Reported-by: Michael Walle <michael@walle.cc>
Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
19 months agocache: l2x0: Fix missing write to Auxiliary Control Register
Ley Foon Tan [Mon, 4 May 2020 10:41:55 +0000 (18:41 +0800)]
cache: l2x0: Fix missing write to Auxiliary Control Register

In commit f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override
bit") we removed writel to regs->pl310_aux_ctrl by accident.  This
commit restores it back.

Fixes: f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override bit")
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
19 months agoscripts/get_default_envs.sh: preserve order of multiple entries for same variable
Rasmus Villemoes [Mon, 6 Jan 2020 12:01:17 +0000 (12:01 +0000)]
scripts/get_default_envs.sh: preserve order of multiple entries for same variable

It's possible that the default_environment[] array contains multiple
entries for the same variable, e.g. a setting from env_default.h based
on some CONFIG_* variable, and another from
CONFIG_EXTRA_ENV_SETTINGS. In such a case, the last setting takes
effect.

Hence, in order to be able to use the output from this script as an
CONFIG_DEFAULT_ENV_FILE and get the same default environment as one
currently has, we need to preserve the order. So only sort by the
variable name, and disable the last-resort comparison.

We could pipe the result through uniq to remove duplicate lines, but I
think there's some value in seeing that certain variables are defined
multiple times.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoMerge git://git.denx.de/u-boot-usb
Tom Rini [Tue, 5 May 2020 18:53:51 +0000 (14:53 -0400)]
Merge git://git.denx.de/u-boot-usb

- MediaTek USB host support

19 months agoMerge tag 'efi-2020-07-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Tue, 5 May 2020 16:32:44 +0000 (12:32 -0400)]
Merge tag 'efi-2020-07-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc2-2

This patch contains error corrections and code simplifications for the UEFI
sub-system.

19 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
Tom Rini [Tue, 5 May 2020 13:08:53 +0000 (09:08 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx

- Add DM model for P1010RDB
- Add I2C DM Model support for P1010RDB, T1042RDB, T2080, T4240RDB,
  MPC8548CDS, T1024RDB, P4080, P3041DS, P2041RDB, P2020RDB, P1020RDB,
  P5040DS
- Fix reference to READM.qe_firmware

19 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Mon, 4 May 2020 15:06:14 +0000 (11:06 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Support 64-bit U-Boot as the payload for coreboot x86

19 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Mon, 4 May 2020 15:05:48 +0000 (11:05 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- 2 MVEBU related fixes

19 months agoMerge tag 'u-boot-imx-20200502' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Mon, 4 May 2020 13:29:42 +0000 (09:29 -0400)]
Merge tag 'u-boot-imx-20200502' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- imxrt: fix LCD clock, fix doc
- new board: Coral Dev
- imx8: enable Cache in SPL. SNVS, update SCFW API
- imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
- MX6ULL : is_imx6ull to include i.MX6ULZ
- Net: add config to enable TXC delay

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914

19 months agonet: pcnet: fix I/O primitives for memory access
Daniel Schwierzeck [Sun, 3 May 2020 17:43:32 +0000 (19:43 +0200)]
net: pcnet: fix I/O primitives for memory access

Commit 69529c912059 ("net: pcnet: Switch to PCI memory access")
switched from PCI IO access to PCI memory access without updating
the I/O primitives. Contrary to SH, the primitives for memory
access and IO access are implemented differently. Thus doing
memory access with IO port primitives breaks the driver on
MIPS Malta board.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
19 months agoMerge tag 'u-boot-rockchip-20200501' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 4 May 2020 11:28:14 +0000 (07:28 -0400)]
Merge tag 'u-boot-rockchip-20200501' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- dts clean up to use -u-boot for px30, rk3399 boards
- dts sycn from upstream kernel for rk3328, rk3399
- add rockchip rng driver
- new board support: rk3328-roc-cc, rk3399-roc-pc,Nanopi M4 2GB

19 months agoMerge branch 'next' of git://git.denx.de/u-boot-sh
Tom Rini [Fri, 1 May 2020 21:58:31 +0000 (17:58 -0400)]
Merge branch 'next' of git://git.denx.de/u-boot-sh

This is part 1 of big network cleanup / DM conversion.
The dc2114x/rtl8139/pcnet/tulip PCI adapter drivers received checkpatch
cleanups in preparation for DM conversion. The smc911x is converted to
DM completely. The dwc_eth_qos cache fixes are applied.

19 months agomkimage: fit: Do not tail-pad fitImage with external data
Marek Vasut [Fri, 1 May 2020 15:40:25 +0000 (17:40 +0200)]
mkimage: fit: Do not tail-pad fitImage with external data

There is no reason to tail-pad fitImage with external data to 4-bytes,
while fitImage without external data does not have any such padding and
is often unaligned. DT spec also does not mandate any such padding.

Moreover, the tail-pad fills the last few bytes with uninitialized data,
which could lead to a potential information leak.

$ echo -n xy > /tmp/data ; \
./tools/mkimage -E -f auto -d /tmp/data /tmp/fitImage ; \
hexdump -vC /tmp/fitImage | tail -n 3

before:
00000260  61 2d 6f 66 66 73 65 74  00 64 61 74 61 2d 73 69  |a-offset.data-si|
00000270  7a 65 00 00 78 79 64 64                           |ze..xydd|
                   ^^       ^^ ^^
after:
00000260  61 2d 6f 66 66 73 65 74  00 64 61 74 61 2d 73 69  |a-offset.data-si|
00000270  7a 65 00 78 79                                    |ze.xy|

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Tom Rini <trini@konsulko.com>
19 months agoefi_loader: change setup sequence
Heinrich Schuchardt [Thu, 19 Mar 2020 18:21:58 +0000 (18:21 +0000)]
efi_loader: change setup sequence

If we want to restore variables from disk, we need to initialize block
devices before variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agotest: stabilize test_efi_secboot
Heinrich Schuchardt [Mon, 4 May 2020 10:21:51 +0000 (12:21 +0200)]
test: stabilize test_efi_secboot

When setting up the console via function efi_console_register() we call
query_console_serial(). This functions sends an escape sequence to the
terminal to query the display size. The response is another escape
sequence.

console.run_command_list() is looking for a regular expression '^==>'.
If the escape sequence for the screen size precedes the prompt without a
line break, no match is found.

When efi_disk_register() is called before efi_console_register() this leads
to a test failuere of the UEFI secure boot tests.

We can avoid the problem if the first UEFI command passed to
u_boot_console.run_command_list() produces output. This patch achieves this
by appending '; echo' to the first UEFI related command of the problematic
tests.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: correct comments for efi_status_t
Heinrich Schuchardt [Sun, 3 May 2020 14:29:00 +0000 (16:29 +0200)]
efi_loader: correct comments for efi_status_t

EFI_STATUS is unsigned (UINTN). Hence it cannot be negative.
Correct comments for 'Return:'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: eliminate efi_set_(non)volatile_variable
Heinrich Schuchardt [Sun, 3 May 2020 08:02:20 +0000 (10:02 +0200)]
efi_loader: eliminate efi_set_(non)volatile_variable

Eliminate superfluous functions efi_set_volatile_variable() and
efi_set_nonvolatile_variable().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: eliminate efi_get_(non)volatile_variable
Heinrich Schuchardt [Sat, 18 Apr 2020 10:31:17 +0000 (12:31 +0200)]
efi_loader: eliminate efi_get_(non)volatile_variable

Eliminate superfluous functions efi_get_volatile_variable() and
efi_get_nonvolatile_variable().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agocmd: efidebug: simplify UEFI protocol calls
Heinrich Schuchardt [Sat, 2 May 2020 14:08:37 +0000 (16:08 +0200)]
cmd: efidebug: simplify UEFI protocol calls

We should not to refer to a function via the run-time or boot services
tables if the function is exported.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: disk: add efi_disk_is_system_part()
AKASHI Takahiro [Mon, 27 Apr 2020 09:48:20 +0000 (18:48 +0900)]
efi_loader: disk: add efi_disk_is_system_part()

This function will check if a given handle to device is an EFI system
partition. It will be utilised in implementing capsule-on-disk feature.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Add function description. Return bool.
Reviewed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: factor out the common code from efi_transfer_secure_state()
AKASHI Takahiro [Tue, 21 Apr 2020 00:39:20 +0000 (09:39 +0900)]
efi_loader: factor out the common code from efi_transfer_secure_state()

efi_set_secure_stat() provides the common code for each stat transition
caused by efi_transfer_secure_state().

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Correct description of return value.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agoefi_loader: fix unreachable statement in efi_sigstore_parse_siglist
AKASHI Takahiro [Tue, 21 Apr 2020 00:38:57 +0000 (09:38 +0900)]
efi_loader: fix unreachable statement in efi_sigstore_parse_siglist

"if (left < esl->signature_size)" is not reachable in a while loop.
But it is still valuable in case that a given signature database is
somehow corrupted. So fix the while loop condition.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agolib/crypto, efi_loader: move some headers to include/crypto
AKASHI Takahiro [Tue, 21 Apr 2020 00:38:17 +0000 (09:38 +0900)]
lib/crypto, efi_loader: move some headers to include/crypto

Pkcs7_parse.h and x509_parser.h are used in UEFI subsystem, in particular,
secure boot. So move them to include/crypto to avoid relative paths.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Don't include include x509_parser.h twice.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agolib/crypto, efi_loader: avoid multiple inclusions of header files
AKASHI Takahiro [Tue, 21 Apr 2020 00:37:52 +0000 (09:37 +0900)]
lib/crypto, efi_loader: avoid multiple inclusions of header files

By adding extra symbols, we can now avoid including x509_parser and
pkcs7_parser.h files multiple times.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Don't include include x509_parser.h twice.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
19 months agox86: Add a 64-bit 'coreboot64' build
Simon Glass [Fri, 1 May 2020 13:36:10 +0000 (07:36 -0600)]
x86: Add a 64-bit 'coreboot64' build

Coreboot is a first-stage bootloader mostly used on x86 devices as an
alternative to UEFI. Coreboot runs in 32-bit mode.

U-Boot currently supports booting from coreboot as a second-stage
bootloader, also in 32-bit mode. However it is useful to be able to run
U-Boot in 64-bit mode. To do this we can have a 32-bit SPL which switches
over the CPU and jumps to a 64-bit U-Boot proper.

Add a new 'coreboot64' board for running 64-bit U-Boot from coreboot. This
uses binman to create an image with a 32-bit SPL and a 64-bit U-Boot.

This allows running 64-bit EFI images on x86, for example, without needing
a native U-Boot port for a board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
19 months agocmd: Add an indication of 32/64-bit to bdinfo
Simon Glass [Fri, 1 May 2020 04:02:13 +0000 (22:02 -0600)]
cmd: Add an indication of 32/64-bit to bdinfo

It is useful to know what mode U-Boot is running in. Add a message at the
end of the 'bdinfo' output.

Suggested-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change commit tag to 'cmd' as this is not x86 specific]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
19 months agox86: coreboot: Allow building an SPL image
Simon Glass [Fri, 1 May 2020 03:21:43 +0000 (21:21 -0600)]
x86: coreboot: Allow building an SPL image

Make a few adjustments to allow us to build an SPL image for coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
19 months agox86: Update SPL for coreboot
Simon Glass [Fri, 1 May 2020 03:21:42 +0000 (21:21 -0600)]
x86: Update SPL for coreboot

At present SPL only works on bare-metal builds. With a few tweaks it can
be used for coreboot also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
19 months agox86: Move work-around out of cpu_jump_to_64bit_uboot()
Simon Glass [Fri, 1 May 2020 03:21:41 +0000 (21:21 -0600)]
x86: Move work-around out of cpu_jump_to_64bit_uboot()

At present this function copies U-Boot from the last 1MB of ROM. This is
not the right way to do it. Instead, the binman symbol should provide the
location.

But in any case the code should live in the caller,
spl_board_load_image(), so that the 64-bit jump function can be used
elsewhere. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
19 months agox86: Allow building an SPL image for coreboot
Simon Glass [Fri, 1 May 2020 03:21:40 +0000 (21:21 -0600)]
x86: Allow building an SPL image for coreboot

Coreboot runs in 32-bit mode and cannot run a 64-bit U-Boot. To get around
this we can build a combined image with 32-bit SPL and 64-bit U-Boot. Add
a build rule and binman definition for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
19 months agox86: Move coreboot-table detection to common 32/64-bit code
Simon Glass [Fri, 1 May 2020 03:21:39 +0000 (21:21 -0600)]
x86: Move coreboot-table detection to common 32/64-bit code

At present this function is only available in 32-bit code. Move it to the
common cpu file so it can be used by 64-bit U-Boot too.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
19 months agocmd: mvebu: bubt: fix quoted string split across lines
Joel Johnson [Sun, 26 Apr 2020 02:54:56 +0000 (20:54 -0600)]
cmd: mvebu: bubt: fix quoted string split across lines

Update quoted string alignment to address checkpatch.pl warning
originally introduced in
commit f60a66ef5d7d ("cmd: mvebu: bubt: show image boot device").

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoarm: dts: uDPU: switch default PHY speed to 3.125Gbit
Jakov Petrina [Fri, 24 Apr 2020 09:24:08 +0000 (11:24 +0200)]
arm: dts: uDPU: switch default PHY speed to 3.125Gbit

This resolves issues with certain SFP modules.

Signed-off-by: Jakov Petrina <jakov.petrina@sartura.hr>
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
19 months agopowerpc: dts: p1010: add i2c node
Biwen Li [Sun, 12 Apr 2020 09:05:28 +0000 (17:05 +0800)]
powerpc: dts: p1010: add i2c node

Add i2c node of p1010

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agodoc: fix references to README.qe_firmware
Heinrich Schuchardt [Sun, 19 Apr 2020 07:19:04 +0000 (09:19 +0200)]
doc: fix references to README.qe_firmware

In two files README.qe_firmware is referenced which never made it into the
U-Boot tree. The README is available in the Linux kernel tree.

Update the references.

Cc: Timur Tabi <timur@kernel.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agoconfigs: P1010RDB: Enable PCIe driver
Hou Zhiqiang [Fri, 1 May 2020 11:06:29 +0000 (19:06 +0800)]
configs: P1010RDB: Enable PCIe driver

Enable the DM PCIe driver in P1010RDB defconfigs.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agopowerpc: P1010RDB: Disable legacy PCIe driver when DM_PCI is enabled
Hou Zhiqiang [Fri, 1 May 2020 11:06:28 +0000 (19:06 +0800)]
powerpc: P1010RDB: Disable legacy PCIe driver when DM_PCI is enabled

Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled
for P1010RDB board.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agopowerpc: P1010RDB: Compile legacy PCIe routines conditionally
Hou Zhiqiang [Fri, 1 May 2020 11:06:27 +0000 (19:06 +0800)]
powerpc: P1010RDB: Compile legacy PCIe routines conditionally

Compile the legacy PCIe initialization reoutines for P1010RDB
boards only when DM_PCI is not enabled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agopowerpc: Enable device tree support for P1010RDB
Hou Zhiqiang [Fri, 1 May 2020 11:06:26 +0000 (19:06 +0800)]
powerpc: Enable device tree support for P1010RDB

Add device tree for P1010RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agoconfigs: T1042D4RDB: enable DM_I2C and DM_RTC
Biwen Li [Fri, 1 May 2020 12:04:22 +0000 (20:04 +0800)]
configs: T1042D4RDB: enable DM_I2C and DM_RTC

This enables DM_I2C and DM_RTC in T1042D4RDB defconfigs,
except T1042D4RDB SECURE_BOOT defconfig

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agodm: powerpc: T1040/T1042: add i2c DM support
Biwen Li [Fri, 1 May 2020 12:04:21 +0000 (20:04 +0800)]
dm: powerpc: T1040/T1042: add i2c DM support

This supports i2c DM for SoC T1040/T1042

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agoconfigs: T2080: enable DM_I2C
Biwen Li [Fri, 1 May 2020 12:04:20 +0000 (20:04 +0800)]
configs: T2080: enable DM_I2C

This enables DM_I2C in T2080 defconfigs

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agodm: powerpc: T2080/T2081: add i2c DM support
Biwen Li [Fri, 1 May 2020 12:04:19 +0000 (20:04 +0800)]
dm: powerpc: T2080/T2081: add i2c DM support

This supports i2c DM for SoC T2080/T2081

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agoconfigs: T4240RDB: enable DM_I2C
Biwen Li [Fri, 1 May 2020 12:04:18 +0000 (20:04 +0800)]
configs: T4240RDB: enable DM_I2C

This enable DM_I2C in T4240RDB defconfigs

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agodm: ppc: T4240: add i2c DM support
Biwen Li [Fri, 1 May 2020 12:04:17 +0000 (20:04 +0800)]
dm: ppc: T4240: add i2c DM support

This supports i2c DM for SoC T4240

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agoconfigs: MPC8548CDS: enable DM_I2C
Biwen Li [Fri, 1 May 2020 12:04:16 +0000 (20:04 +0800)]
configs: MPC8548CDS: enable DM_I2C

This enables DM_I2C in MPC8548CDS defconfigs

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agodm: ppc: MPC8548CDS: add i2c DM support
Biwen Li [Fri, 1 May 2020 12:56:37 +0000 (20:56 +0800)]
dm: ppc: MPC8548CDS: add i2c DM support

This supports i2c DM for board MPC8548CDS

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
19 months agoconfigs: P1010: Enable DM_I2C and DM_RTC
Biwen Li [Fri, 1 May 2020 12:04:14 +0000 (20:04 +0800)]
configs: P1010: Enable DM_I2C and DM_RTC

Enable DM_I2C and DM_RTC in P1010RDB defconfigs,
except P1010RDB SECBOOT defconfigs.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>