imx: mx6sl: Extend USDHC SD2 pins to support 8-wire use
authorOtavio Salvador <otavio@ossystems.com.br>
Tue, 17 Feb 2015 12:42:45 +0000 (10:42 -0200)
committerStefano Babic <sbabic@denx.de>
Mon, 23 Feb 2015 08:11:43 +0000 (09:11 +0100)
This adds the DATA[4-7] and RST pin definitions.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
arch/arm/include/asm/arch-mx6/mx6sl_pins.h

index 04752031f49652668fff275161d747c2e84e057a..6ba1034b2e3cabbf39aa957e86f109016171615d 100644 (file)
@@ -31,7 +31,12 @@ enum {
        MX6_PAD_SD2_DAT1__USDHC2_DAT1                           = IOMUX_PAD(0x0568, 0x0260, 0, 0x0000, 0, 0),
        MX6_PAD_SD2_DAT2__USDHC2_DAT2                           = IOMUX_PAD(0x056C, 0x0264, 0, 0x0000, 0, 0),
        MX6_PAD_SD2_DAT3__USDHC2_DAT3                           = IOMUX_PAD(0x0570, 0x0268, 0, 0x0000, 0, 0),
+       MX6_PAD_SD2_DAT4__USDHC2_DAT4                           = IOMUX_PAD(0X0574, 0X026C, 0, 0X0000, 0, 0),
+       MX6_PAD_SD2_DAT5__USDHC2_DAT5                           = IOMUX_PAD(0X0578, 0X0270, 0, 0X0000, 0, 0),
+       MX6_PAD_SD2_DAT6__USDHC2_DAT6                           = IOMUX_PAD(0X057C, 0X0274, 0, 0X0000, 0, 0),
+       MX6_PAD_SD2_DAT7__USDHC2_DAT7                           = IOMUX_PAD(0X0580, 0X0278, 0, 0X0000, 0, 0),
        MX6_PAD_SD2_DAT7__GPIO_5_0                                      = IOMUX_PAD(0x0580, 0x0278, 5, 0x0000, 0, 0),
+       MX6_PAD_SD2_RST__USDHC2_RST                             = IOMUX_PAD(0x0584, 0x027C, 0, 0x0000, 0, 0),
        MX6_PAD_SD3_CLK__USDHC3_CLK                                     = IOMUX_PAD(0x0588, 0x0280, 0, 0x0000, 0, 0),
        MX6_PAD_SD3_CMD__USDHC3_CMD                                     = IOMUX_PAD(0x058C, 0x0284, 0, 0x0000, 0, 0),
        MX6_PAD_SD3_DAT0__USDHC3_DAT0                           = IOMUX_PAD(0x0590, 0x0288, 0, 0x0000, 0, 0),