x86: coral: Correct some FSP-M settings
authorSimon Glass <sjg@chromium.org>
Wed, 27 May 2020 11:42:11 +0000 (05:42 -0600)
committerBin Meng <bmeng.cn@gmail.com>
Tue, 2 Jun 2020 01:16:13 +0000 (09:16 +0800)
Some settings were modified slightly in the device-tree conversion. Return
these to their original values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/dts/chromebook_coral.dts

index dea35b73a0f7ae204dcd3b2eef836c51d0c766bc..fe0d4dedd7c8ba0a5755e3b0deddae2e55ceb802 100644 (file)
                20 23 22 21 18 19 16 17
                /* DQB[7:15] pins of LPDDR4 module with offset of 16 */
                25 28 30 31 26 27 24 29>;
+
+       fspm,dimm0-spd-address = <0>;
+       fspm,dimm1-spd-address = <0>;
+       fspm,skip-cse-rbp = <1>;
+       fspm,enable-s3-heci2 = <0>;
 };
 
 &fsp_s {