ARM: dts: rmobile: Enable eMMC DDR52 modes on Gen3 Salvator-X(S),ULCB,Ebisu
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Sun, 8 Mar 2020 17:25:09 +0000 (18:25 +0100)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Wed, 20 May 2020 11:20:25 +0000 (13:20 +0200)
Enable DDR52 modes, since the SD core supports correct switching now.
For completeness, list HS200 modes, however those were already enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
arch/arm/dts/r8a77950-salvator-x-u-boot.dts
arch/arm/dts/r8a77950-ulcb-u-boot.dts
arch/arm/dts/r8a77960-salvator-x-u-boot.dts
arch/arm/dts/r8a77960-ulcb-u-boot.dts
arch/arm/dts/r8a77965-salvator-x-u-boot.dts
arch/arm/dts/r8a77965-ulcb-u-boot.dts
arch/arm/dts/r8a77990-ebisu.dts

index 6e5c271d3cda2da5dad11eb667a17f0ce06fc828..e039e33d5944d90cd65aec4b83eaf93be4ac538e 100644 (file)
@@ -16,6 +16,8 @@
 };
 
 &sdhi2 {
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        max-frequency = <200000000>;
 };
index fb9bbe1439521b54798c83247742aa7c52ec5165..b7f26c11b1574299b50fccf5b7a72c22c44cd469 100644 (file)
@@ -27,6 +27,8 @@
 };
 
 &sdhi2 {
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        max-frequency = <200000000>;
 };
index a3f2d74150ecc0b10694dcab123728b4b26d6f32..d3b09246f597dbd19b024b2ee0f3c5a133c51899 100644 (file)
@@ -16,6 +16,8 @@
 };
 
 &sdhi2 {
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        max-frequency = <200000000>;
 };
index 04023d959719f577ed29fde8cd52028a0f333aea..bd1d634574884a32c199c4c400df3853983ae814 100644 (file)
@@ -27,6 +27,8 @@
 };
 
 &sdhi2 {
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        max-frequency = <200000000>;
 };
index e4bd2d3e4f74071c9c6c66fec3f5161ac9239027..d6f0708555419a8e53781bc81c949480a8030bf4 100644 (file)
@@ -17,6 +17,8 @@
 };
 
 &sdhi2 {
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        max-frequency = <200000000>;
        status = "okay";
index 28fb30e9a90fb8a57dac8d2661bdc23609763973..954d8b685c36b6c8e80ec48111bc38940267ee20 100644 (file)
@@ -28,6 +28,8 @@
 };
 
 &sdhi2 {
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        max-frequency = <200000000>;
        status = "okay";
index 4fd2b14fbb8b5a13ba1387474c202248673db705..07a4c9bbae49179363d90c36088909010e147b09 100644 (file)
 
        vmmc-supply = <&reg_3p3v>;
        vqmmc-supply = <&reg_1p8v>;
+       mmc-ddr-1_8v;
        mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        bus-width = <8>;