armv8: fsl-layerscape: fix SEC QI ICID setup
authorLaurentiu Tudor <laurentiu.tudor@nxp.com>
Tue, 26 Feb 2019 11:18:33 +0000 (13:18 +0200)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Sun, 3 Mar 2019 16:31:09 +0000 (22:01 +0530)
commite82d9ee73a2ab6ae76999f4eb37807af7e38cdc0
treeacb55c5951b623566bfc13b2d0793438004cc3f1
parentd8d5fdb7b2ab9154beee2936082bfb65bf4d9209
armv8: fsl-layerscape: fix SEC QI ICID setup

The SEC QI ICID setup in the QIIC_LS register is actually an offset
that is being added to the ICID coming from the qman portal. Setting
it with a non-zero value breaks SMMU setup as the resulting ICID is
not known. On top of that, the SEC QI ICID must match the qman portal
ICIDs in order to share the isolation context.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h