xtensa: add support for the xtensa processor architecture [1/2]
authorChris Zankel <chris@zankel.net>
Wed, 10 Aug 2016 15:36:43 +0000 (18:36 +0300)
committerTom Rini <trini@konsulko.com>
Mon, 15 Aug 2016 22:46:38 +0000 (18:46 -0400)
commitde5e5cea022ab44006ff1edf45a39f0943fb9dff
tree8dbaf0260ec277035ecb514d8437bd4cd05de70e
parentf225d39d30935c3d27271bee676ef554fa9b0f3c
xtensa: add support for the xtensa processor architecture [1/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.

This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and additional
drivers will be in separate commits.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
MAINTAINERS
Makefile
cmd/bdinfo.c
common/board_f.c
common/image.c
doc/README.xtensa [new file with mode: 0644]
examples/standalone/stubs.c
include/image.h
include/linux/stat.h