armv8: ls1028a: Add NXP LS1028A SoC support
authorYuantian Tang <andy.tang@nxp.com>
Wed, 10 Apr 2019 08:43:33 +0000 (16:43 +0800)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Wed, 22 May 2019 06:54:24 +0000 (12:24 +0530)
commitd4ad111dc4da561d1638f5edb87fa2e6012300d8
tree9d0a242a9e94e4fe6301b3bfc140359e021447c0
parent25ce6f8d11cf16d7e27ddfacaa3ff0f337fe3334
armv8: ls1028a: Add NXP LS1028A SoC support

Ls1028a SoC is based on Layerscape Chassis Generation 3.2
architecture with features:
 2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN
 ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers,
 6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc.

Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/Makefile
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c [new file with mode: 0644]
arch/arm/dts/fsl-ls1028a.dtsi [new file with mode: 0644]
arch/arm/include/asm/arch-fsl-layerscape/config.h
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
arch/arm/include/asm/arch-fsl-layerscape/soc.h
arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h