riscv: ax25: add SPL support
authorRick Chen <rick@andestech.com>
Thu, 14 Nov 2019 05:52:21 +0000 (13:52 +0800)
committerAndes <uboot@andestech.com>
Tue, 10 Dec 2019 00:23:10 +0000 (08:23 +0800)
commitca06444aac2c643db3a3f2eb37afc60fae15177e
treeb8b80458bbd6e047b1f850c8a4353180bcba74cd
parent31fbf6032ddd9b968b1ca102f71fe7f42fabf58a
riscv: ax25: add SPL support

The U-Boot SPL will boot in M mode and load the FIT image which
include OpenSBI and U-Boot proper images. After loading progress,
it will jump to OpenSBI first and then U-Boot proper which will
run in S mode.

Also remove V5L2_CACHE due to U-Boot SPL code size consideration.
Without this concern, it can be enable manually for performance.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
arch/riscv/cpu/ax25/Kconfig