phy: atheros: ar8035: remove static clock config
authorMichael Walle <michael@walle.cc>
Wed, 6 May 2020 22:11:58 +0000 (00:11 +0200)
committerTom Rini <trini@konsulko.com>
Thu, 7 May 2020 15:05:01 +0000 (11:05 -0400)
commit6333cbb3817ed551cd7d4e92f7359c73ccc567fc
tree5ae23973fea2ab138c6ce63624637e60e1f4c570
parentfe6293a8095998affd5e46e7968485fcc332e0fa
phy: atheros: ar8035: remove static clock config

We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.

If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <125000000>" because that value was the hardcoded
value until this commit.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
drivers/net/phy/atheros.c