armv8: layerscape: sata: refine port register configuration
authorYuantian Tang <andy.tang@nxp.com>
Mon, 11 Dec 2017 05:12:09 +0000 (13:12 +0800)
committerYork Sun <york.sun@nxp.com>
Wed, 10 Jan 2018 20:28:14 +0000 (12:28 -0800)
commit1b76f3b8ab70f221e4272026cabe0b60953eb8cf
treed32351506481359acf62bfd4e50dcb2522011280
parentfa60abc6e690627ef8441a0ca6fc5cedd0b16374
armv8: layerscape: sata: refine port register configuration

Sata registers PP2C and PP3C are used to control the configuration
of the PHY control OOB timing for the COMINIT/COMWAKE parameters
respectively. Calculate those parameters from port clock frequency.
Overwrite those registers with calculated values to get better OOB
timing.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/soc.c
arch/arm/include/asm/arch-fsl-layerscape/soc.h