X-Git-Url: https://git.librecmc.org/?p=oweals%2Fu-boot.git;a=blobdiff_plain;f=arch%2Fx86%2Finclude%2Fasm%2Fglobal_data.h;h=4aee2f3e8c46554ef6b40fc18bc94fde96145338;hp=797397e6977e6ad1846ccc14b71b459c82fbf10c;hb=c27178ba3649f539c9f1890ea147f4c5415f63b5;hpb=feb5a02f869d5678190dfc915ef6c2781b4f7a6c diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 797397e697..4aee2f3e8c 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -10,6 +10,7 @@ #ifndef __ASSEMBLY__ #include +#include enum pei_boot_mode_t { PEI_BOOT_NONE = 0, @@ -66,6 +67,21 @@ struct mtrr_request { uint64_t size; }; +/** + * struct mrc_output - holds the MRC data + * + * @buf: MRC training data to save for the next boot. This is set to point to + * the raw data after SDRAM init is complete. Then mrccache_setup() + * turns it into a proper cache record with a checksum + * @len: Length of @buf + * @cache: Resulting cache record + */ +struct mrc_output { + char *buf; + uint len; + struct mrc_data_container *cache; +}; + /* Architecture-specific global data */ struct arch_global_data { u64 gdt[X86_GDT_NUM_ENTRIES] __aligned(16); @@ -76,6 +92,7 @@ struct arch_global_data { uint8_t x86_mask; uint32_t x86_device; uint64_t tsc_base; /* Initial value returned by rdtsc() */ + bool tsc_inited; /* true if tsc is ready for use */ unsigned long clock_rate; /* Clock rate of timer in Hz */ void *new_fdt; /* Relocated FDT */ uint32_t bist; /* Built-in self test value */ @@ -89,12 +106,12 @@ struct arch_global_data { struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS]; int mtrr_req_count; int has_mtrr; - /* MRC training data to save for the next boot */ - char *mrc_output; - unsigned int mrc_output_len; + /* MRC training data */ + struct mrc_output mrc[MRC_TYPE_COUNT]; ulong table; /* Table pointer from previous loader */ int turbo_state; /* Current turbo state */ struct irq_routing_table *pirq_routing_table; + int dw_i2c_num_cards; /* Used by designware i2c driver */ #ifdef CONFIG_SEABIOS u32 high_table_ptr; u32 high_table_limit; @@ -103,6 +120,10 @@ struct arch_global_data { int prev_sleep_state; /* Previous sleep state ACPI_S0/1../5 */ ulong backup_mem; /* Backup memory address for S3 */ #endif +#ifdef CONFIG_FSP_VERSION2 + struct fsp_header *fsp_s_hdr; /* Pointer to FSP-S header */ +#endif + ulong acpi_start; /* Start address of ACPI tables */ }; #endif @@ -137,10 +158,4 @@ static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void) #endif -/* - * Our private Global Data Flags - */ -#define GD_FLG_COLD_BOOT 0x10000 /* Cold Boot */ -#define GD_FLG_WARM_BOOT 0x20000 /* Warm Boot */ - #endif /* __ASM_GBL_DATA_H */