X-Git-Url: https://git.librecmc.org/?p=oweals%2Fu-boot.git;a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-fsl-layerscape%2Fsoc.h;h=020548ac6ce635b122cbc0f9865292132286fd60;hp=234440b5fec1bd51650760540d9fa1436476ee03;hb=c27178ba3649f539c9f1890ea147f4c5415f63b5;hpb=eb53a18c9e903e35e8e8d52da96c33b63822881c

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 234440b5fe..020548ac6c 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  * Copyright 2015 Freescale Semiconductor
  */
 
@@ -83,6 +83,9 @@ enum boot_src get_boot_src(void);
 /* LS1043A/LS1023A 23x23 package silicon has different value of VAR_PER */
 #define SVR_LS1043A_P23		0x879202
 #define SVR_LS1023A_P23		0x87920A
+#define SVR_LS1017A		0x870B24
+#define SVR_LS1018A		0x870B20
+#define SVR_LS1027A		0x870B04
 #define SVR_LS1028A		0x870B00
 #define SVR_LS1046A		0x870700
 #define SVR_LS1026A		0x870708
@@ -100,9 +103,9 @@ enum boot_src get_boot_src(void);
 #define SVR_LS2044A		0x870930
 #define SVR_LS2081A		0x870918
 #define SVR_LS2041A		0x870914
-#define SVR_LX2160A		0x873601
-#define SVR_LX2120A		0x873621
-#define SVR_LX2080A		0x873603
+#define SVR_LX2160A		0x873600
+#define SVR_LX2120A		0x873620
+#define SVR_LX2080A		0x873602
 
 #define SVR_MAJ(svr)		(((svr) >> 4) & 0xf)
 #define SVR_MIN(svr)		(((svr) >> 0) & 0xf)
@@ -112,6 +115,9 @@ enum boot_src get_boot_src(void);
 #ifdef CONFIG_ARCH_LX2160A
 #define IS_C_PROCESSOR(svr)	(!((svr >> 12) & 0x1))
 #endif
+#ifdef CONFIG_ARCH_LS1028A
+#define IS_MULTIMEDIA_EN(svr)	(!((svr >> 10) & 0x1))
+#endif
 #define IS_SVR_REV(svr, maj, min) \
 		((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
 #define SVR_DEV(svr)		((svr) >> 8)
@@ -134,6 +140,13 @@ void init_pfe_scfg_dcfg_regs(void);
 int qspi_ahb_init(void);
 #endif
 
+#ifdef CONFIG_FSPI_AHB_EN_4BYTE
+#define SYS_NXP_FSPI_LUTCR_LOCK			0x00000001
+#define SYS_NXP_FSPI_LUTCR_UNLOCK		0x00000002
+#define SYS_NXP_FSPI_LUTKEY			0x5AF05AF0
+int fspi_ahb_init(void);
+#endif
+
 void cpu_name(char *name);
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
 void erratum_a009635(void);
@@ -145,6 +158,10 @@ void erratum_a010315(void);
 
 bool soc_has_dp_ddr(void);
 bool soc_has_aiop(void);
+
+#ifdef CONFIG_GIC_V3_ITS
+int ls_gic_rd_tables_init(void *blob);
+#endif
 #endif
 
 #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */