X-Git-Url: https://git.librecmc.org/?p=oweals%2Fu-boot.git;a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fsama5d2.dtsi;h=6fb2cb25f984ea3300167f5e8698892664106741;hp=19feb6609dbf8205110c3903c9257d11b63cb6c8;hb=d32cbefc8ac82bd0206f806efb07df82c4b92d5b;hpb=2c4b2dd28955075e7f8702f0192d4e8bdf80d4f6 diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index 19feb6609d..6fb2cb25f9 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -7,6 +7,7 @@ aliases { spi0 = &spi0; spi1 = &qspi0; + spi2 = &qspi1; i2c0 = &i2c0; i2c1 = &i2c1; }; @@ -29,6 +30,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; + u-boot,dm-pre-reloc; usb1: ohci@00400000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; @@ -66,6 +68,14 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; + u-boot,dm-pre-reloc; + + hlcdc: hlcdc@f0000000 { + compatible = "atmel,at91sam9x5-hlcdc"; + reg = <0xf0000000 0x2000>; + clocks = <&lcdc_clk>; + status = "disabled"; + }; pmc: pmc@f0014000 { compatible = "atmel,sama5d2-pmc", "syscon"; @@ -73,13 +83,15 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; + u-boot,dm-pre-reloc; main: mainck { compatible = "atmel,at91sam9x5-clk-main"; #clock-cells = <0>; + u-boot,dm-pre-reloc; }; - plla: pllack { + plla: pllack@0 { compatible = "atmel,sama5d3-clk-pll"; #clock-cells = <0>; clocks = <&main>; @@ -87,6 +99,7 @@ atmel,clk-input-range = <12000000 12000000>; #atmel,pll-clk-output-range-cells = <4>; atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>; + u-boot,dm-pre-reloc; }; plladiv: plladivck { @@ -117,6 +130,8 @@ compatible = "atmel,at91sam9x5-clk-utmi"; #clock-cells = <0>; clocks = <&main>; + regmap-sfr = <&sfr>; + u-boot,dm-pre-reloc; }; mck: masterck { @@ -125,12 +140,14 @@ clocks = <&main>, <&plladiv>, <&utmi>; atmel,clk-output-range = <124000000 166000000>; atmel,clk-divisors = <1 2 4 3>; + u-boot,dm-pre-reloc; }; h32ck: h32mxck { #clock-cells = <0>; compatible = "atmel,sama5d4-clk-h32mx"; clocks = <&mck>; + u-boot,dm-pre-reloc; }; usb: usbck { @@ -146,17 +163,17 @@ interrupt-parent = <&pmc>; clocks = <&main>, <&plladiv>, <&utmi>, <&mck>; - prog0: prog0 { + prog0: prog@0 { #clock-cells = <0>; reg = <0>; }; - prog1: prog1 { + prog1: prog@1 { #clock-cells = <0>; reg = <1>; }; - prog2: prog2 { + prog2: prog@2 { #clock-cells = <0>; reg = <2>; }; @@ -167,49 +184,49 @@ #address-cells = <1>; #size-cells = <0>; - ddrck: ddrck { + ddrck: ddrck@2 { #clock-cells = <0>; reg = <2>; clocks = <&mck>; }; - lcdck: lcdck { + lcdck: lcdck@3 { #clock-cells = <0>; reg = <3>; clocks = <&mck>; }; - uhpck: uhpck { + uhpck: uhpck@6 { #clock-cells = <0>; reg = <6>; clocks = <&usb>; }; - udpck: udpck { + udpck: udpck@7 { #clock-cells = <0>; reg = <7>; clocks = <&usb>; }; - pck0: pck0 { + pck0: pck0@8 { #clock-cells = <0>; reg = <8>; clocks = <&prog0>; }; - pck1: pck1 { + pck1: pck1@9 { #clock-cells = <0>; reg = <9>; clocks = <&prog1>; }; - pck2: pck2 { + pck2: pck2@10 { #clock-cells = <0>; reg = <10>; clocks = <&prog2>; }; - iscck: iscck { + iscck: iscck@18 { #clock-cells = <0>; reg = <18>; clocks = <&mck>; @@ -221,204 +238,210 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&h32ck>; + u-boot,dm-pre-reloc; - macb0_clk: macb0_clk { + macb0_clk: macb0_clk@5 { #clock-cells = <0>; reg = <5>; atmel,clk-output-range = <0 83000000>; }; - tdes_clk: tdes_clk { + tdes_clk: tdes_clk@11 { #clock-cells = <0>; reg = <11>; atmel,clk-output-range = <0 83000000>; }; - matrix1_clk: matrix1_clk { + matrix1_clk: matrix1_clk@14 { #clock-cells = <0>; reg = <14>; }; - hsmc_clk: hsmc_clk { + hsmc_clk: hsmc_clk@17 { #clock-cells = <0>; reg = <17>; }; - pioA_clk: pioA_clk { + pioA_clk: pioA_clk@18 { #clock-cells = <0>; reg = <18>; atmel,clk-output-range = <0 83000000>; + u-boot,dm-pre-reloc; }; - flx0_clk: flx0_clk { + flx0_clk: flx0_clk@19 { #clock-cells = <0>; reg = <19>; atmel,clk-output-range = <0 83000000>; }; - flx1_clk: flx1_clk { + flx1_clk: flx1_clk@20 { #clock-cells = <0>; reg = <20>; atmel,clk-output-range = <0 83000000>; }; - flx2_clk: flx2_clk { + flx2_clk: flx2_clk@21 { #clock-cells = <0>; reg = <21>; atmel,clk-output-range = <0 83000000>; }; - flx3_clk: flx3_clk { + flx3_clk: flx3_clk@22 { #clock-cells = <0>; reg = <22>; atmel,clk-output-range = <0 83000000>; }; - flx4_clk: flx4_clk { + flx4_clk: flx4_clk@23 { #clock-cells = <0>; reg = <23>; atmel,clk-output-range = <0 83000000>; }; - uart0_clk: uart0_clk { + uart0_clk: uart0_clk@24 { #clock-cells = <0>; reg = <24>; atmel,clk-output-range = <0 83000000>; + u-boot,dm-pre-reloc; }; - uart1_clk: uart1_clk { + uart1_clk: uart1_clk@25 { #clock-cells = <0>; reg = <25>; atmel,clk-output-range = <0 83000000>; + u-boot,dm-pre-reloc; }; - uart2_clk: uart2_clk { + uart2_clk: uart2_clk@26 { #clock-cells = <0>; reg = <26>; atmel,clk-output-range = <0 83000000>; + u-boot,dm-pre-reloc; }; - uart3_clk: uart3_clk { + uart3_clk: uart3_clk@27 { #clock-cells = <0>; reg = <27>; atmel,clk-output-range = <0 83000000>; }; - uart4_clk: uart4_clk { + uart4_clk: uart4_clk@28 { #clock-cells = <0>; reg = <28>; atmel,clk-output-range = <0 83000000>; }; - twi0_clk: twi0_clk { + twi0_clk: twi0_clk@29 { reg = <29>; #clock-cells = <0>; atmel,clk-output-range = <0 83000000>; }; - twi1_clk: twi1_clk { + twi1_clk: twi1_clk@30 { #clock-cells = <0>; reg = <30>; atmel,clk-output-range = <0 83000000>; }; - spi0_clk: spi0_clk { + spi0_clk: spi0_clk@33 { #clock-cells = <0>; reg = <33>; atmel,clk-output-range = <0 83000000>; + u-boot,dm-pre-reloc; }; - spi1_clk: spi1_clk { + spi1_clk: spi1_clk@34 { #clock-cells = <0>; reg = <34>; atmel,clk-output-range = <0 83000000>; }; - tcb0_clk: tcb0_clk { + tcb0_clk: tcb0_clk@35 { #clock-cells = <0>; reg = <35>; atmel,clk-output-range = <0 83000000>; }; - tcb1_clk: tcb1_clk { + tcb1_clk: tcb1_clk@36 { #clock-cells = <0>; reg = <36>; atmel,clk-output-range = <0 83000000>; }; - pwm_clk: pwm_clk { + pwm_clk: pwm_clk@38 { #clock-cells = <0>; reg = <38>; atmel,clk-output-range = <0 83000000>; }; - adc_clk: adc_clk { + adc_clk: adc_clk@40 { #clock-cells = <0>; reg = <40>; atmel,clk-output-range = <0 83000000>; }; - uhphs_clk: uhphs_clk { + uhphs_clk: uhphs_clk@41 { #clock-cells = <0>; reg = <41>; atmel,clk-output-range = <0 83000000>; }; - udphs_clk: udphs_clk { + udphs_clk: udphs_clk@42 { #clock-cells = <0>; reg = <42>; atmel,clk-output-range = <0 83000000>; }; - ssc0_clk: ssc0_clk { + ssc0_clk: ssc0_clk@43 { #clock-cells = <0>; reg = <43>; atmel,clk-output-range = <0 83000000>; }; - ssc1_clk: ssc1_clk { + ssc1_clk: ssc1_clk@44 { #clock-cells = <0>; reg = <44>; atmel,clk-output-range = <0 83000000>; }; - trng_clk: trng_clk { + trng_clk: trng_clk@47 { #clock-cells = <0>; reg = <47>; atmel,clk-output-range = <0 83000000>; }; - pdmic_clk: pdmic_clk { + pdmic_clk: pdmic_clk@48 { #clock-cells = <0>; reg = <48>; atmel,clk-output-range = <0 83000000>; }; - i2s0_clk: i2s0_clk { + i2s0_clk: i2s0_clk@54 { #clock-cells = <0>; reg = <54>; atmel,clk-output-range = <0 83000000>; }; - i2s1_clk: i2s1_clk { + i2s1_clk: i2s1_clk@55 { #clock-cells = <0>; reg = <55>; atmel,clk-output-range = <0 83000000>; }; - can0_clk: can0_clk { + can0_clk: can0_clk@56 { #clock-cells = <0>; reg = <56>; atmel,clk-output-range = <0 83000000>; }; - can1_clk: can1_clk { + can1_clk: can1_clk@57 { #clock-cells = <0>; reg = <57>; atmel,clk-output-range = <0 83000000>; }; - classd_clk: classd_clk { + classd_clk: classd_clk@59 { #clock-cells = <0>; reg = <59>; atmel,clk-output-range = <0 83000000>; @@ -430,70 +453,75 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; + u-boot,dm-pre-reloc; - dma0_clk: dma0_clk { + dma0_clk: dma0_clk@6 { #clock-cells = <0>; reg = <6>; }; - dma1_clk: dma1_clk { + dma1_clk: dma1_clk@7 { #clock-cells = <0>; reg = <7>; }; - aes_clk: aes_clk { + aes_clk: aes_clk@9 { #clock-cells = <0>; reg = <9>; }; - aesb_clk: aesb_clk { + aesb_clk: aesb_clk@10 { #clock-cells = <0>; reg = <10>; }; - sha_clk: sha_clk { + sha_clk: sha_clk@12 { #clock-cells = <0>; reg = <12>; }; - mpddr_clk: mpddr_clk { + mpddr_clk: mpddr_clk@13 { #clock-cells = <0>; reg = <13>; }; - matrix0_clk: matrix0_clk { + matrix0_clk: matrix0_clk@15 { #clock-cells = <0>; reg = <15>; }; - sdmmc0_hclk: sdmmc0_hclk { + sdmmc0_hclk: sdmmc0_hclk@31 { #clock-cells = <0>; reg = <31>; + u-boot,dm-pre-reloc; }; - sdmmc1_hclk: sdmmc1_hclk { + sdmmc1_hclk: sdmmc1_hclk@32 { #clock-cells = <0>; reg = <32>; + u-boot,dm-pre-reloc; }; - lcdc_clk: lcdc_clk { + lcdc_clk: lcdc_clk@45 { #clock-cells = <0>; reg = <45>; }; - isc_clk: isc_clk { + isc_clk: isc_clk@46 { #clock-cells = <0>; reg = <46>; }; - qspi0_clk: qspi0_clk { + qspi0_clk: qspi0_clk@52 { #clock-cells = <0>; reg = <52>; + u-boot,dm-pre-reloc; }; - qspi1_clk: qspi1_clk { + qspi1_clk: qspi1_clk@53 { #clock-cells = <0>; reg = <53>; + u-boot,dm-pre-reloc; }; }; @@ -503,63 +531,66 @@ #size-cells = <0>; interrupt-parent = <&pmc>; clocks = <&main>, <&plla>, <&utmi>, <&mck>; + u-boot,dm-pre-reloc; - sdmmc0_gclk: sdmmc0_gclk { + sdmmc0_gclk: sdmmc0_gclk@31 { #clock-cells = <0>; reg = <31>; + u-boot,dm-pre-reloc; }; - sdmmc1_gclk: sdmmc1_gclk { + sdmmc1_gclk: sdmmc1_gclk@32 { #clock-cells = <0>; reg = <32>; + u-boot,dm-pre-reloc; }; - tcb0_gclk: tcb0_gclk { + tcb0_gclk: tcb0_gclk@35 { #clock-cells = <0>; reg = <35>; atmel,clk-output-range = <0 83000000>; }; - tcb1_gclk: tcb1_gclk { + tcb1_gclk: tcb1_gclk@36 { #clock-cells = <0>; reg = <36>; atmel,clk-output-range = <0 83000000>; }; - pwm_gclk: pwm_gclk { + pwm_gclk: pwm_gclk@38 { #clock-cells = <0>; reg = <38>; atmel,clk-output-range = <0 83000000>; }; - pdmic_gclk: pdmic_gclk { + pdmic_gclk: pdmic_gclk@48 { #clock-cells = <0>; reg = <48>; }; - i2s0_gclk: i2s0_gclk { + i2s0_gclk: i2s0_gclk@54 { #clock-cells = <0>; reg = <54>; }; - i2s1_gclk: i2s1_gclk { + i2s1_gclk: i2s1_gclk@55 { #clock-cells = <0>; reg = <55>; }; - can0_gclk: can0_gclk { + can0_gclk: can0_gclk@56 { #clock-cells = <0>; reg = <56>; atmel,clk-output-range = <0 80000000>; }; - can1_gclk: can1_gclk { + can1_gclk: can1_gclk@57 { #clock-cells = <0>; reg = <57>; atmel,clk-output-range = <0 80000000>; }; - classd_gclk: classd_gclk { + classd_gclk: classd_gclk@59 { #clock-cells = <0>; reg = <59>; atmel,clk-output-range = <0 100000000>; @@ -577,6 +608,16 @@ status = "disabled"; }; + qspi1: spi@f0024000 { + compatible = "atmel,sama5d2-qspi"; + reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>; + reg-names = "qspi_base", "qspi_mmap"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&qspi1_clk>; + status = "disabled"; + }; + spi0: spi@f8000000 { compatible = "atmel,at91rm9200-spi"; reg = <0xf8000000 0x100>; @@ -597,9 +638,27 @@ status = "disabled"; }; + uart0: serial@f801c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf801c000 0x100>; + clocks = <&uart0_clk>; + clock-names = "usart"; + status = "disabled"; + }; + uart1: serial@f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x100>; + clocks = <&uart1_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + uart2: serial@f8024000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8024000 0x100>; + clocks = <&uart2_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -612,6 +671,39 @@ status = "disabled"; }; + rstc@f8048000 { + compatible = "atmel,sama5d3-rstc"; + reg = <0xf8048000 0x10>; + clocks = <&clk32k>; + }; + + shdwc@f8048010 { + compatible = "atmel,sama5d2-shdwc"; + reg = <0xf8048010 0x10>; + clocks = <&clk32k>; + #address-cells = <1>; + #size-cells = <0>; + atmel,wakeup-rtc-timer; + }; + + pit: timer@f8048030 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xf8048030 0x10>; + clocks = <&h32ck>; + }; + + watchdog@f8048040 { + compatible = "atmel,sama5d4-wdt"; + reg = <0xf8048040 0x10>; + clocks = <&clk32k>; + status = "disabled"; + }; + + sfr: sfr@f8030000 { + compatible = "atmel,sama5d2-sfr", "syscon"; + reg = <0xf8030000 0x98>; + }; + sckc@f8048050 { compatible = "atmel,at91sam9x5-sckc"; reg = <0xf8048050 0x4>; @@ -646,6 +738,22 @@ status = "disabled"; }; + uart3: serial@fc008000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfc008000 0x100>; + clocks = <&uart3_clk>; + clock-names = "usart"; + status = "disabled"; + }; + + uart4: serial@fc00c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfc00c000 0x100>; + clocks = <&uart4_clk>; + clock-names = "usart"; + status = "disabled"; + }; + i2c1: i2c@fc028000 { compatible = "atmel,sama5d2-i2c"; reg = <0xfc028000 0x100>; @@ -661,11 +769,18 @@ clocks = <&pioA_clk>; gpio-controller; #gpio-cells = <2>; + u-boot,dm-pre-reloc; pinctrl { compatible = "atmel,sama5d2-pinctrl"; + u-boot,dm-pre-reloc; }; }; }; }; + + onewire_tm: onewire { + compatible = "w1-gpio"; + status = "disabled"; + }; };