Merge tag 'efi-2020-01-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

[oweals/u-boot.git] / include / mmc.h

diff --git a/include/mmc.h b/include/mmc.h
index 1f30f71d25f8cda5ac77f6a6a9ca07fe9ed38d51..1a9efe4c3843efdfcaaa5926d27a417401733ecb 100644 (file)
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -65,6 +65,11 @@
 #define MMC_MODE_DDR_52MHz     MMC_CAP(MMC_DDR_52)
 #define MMC_MODE_HS200         MMC_CAP(MMC_HS_200)
 #define MMC_MODE_HS400         MMC_CAP(MMC_HS_400)
+#define MMC_MODE_HS400_ES      MMC_CAP(MMC_HS_400_ES)
+
+#define MMC_CAP_NONREMOVABLE   BIT(14)
+#define MMC_CAP_NEEDS_POLL     BIT(15)
+#define MMC_CAP_CD_ACTIVE_HIGH  BIT(16)
 
 #define MMC_MODE_8BIT          BIT(30)
 #define MMC_MODE_4BIT          BIT(29)
@@ -219,13 +224,16 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx)
 #define EXT_CSD_BOOT_BUS_WIDTH         177
 #define EXT_CSD_PART_CONF              179     /* R/W */
 #define EXT_CSD_BUS_WIDTH              183     /* R/W */
+#define EXT_CSD_STROBE_SUPPORT         184     /* R/W */
 #define EXT_CSD_HS_TIMING              185     /* R/W */
 #define EXT_CSD_REV                    192     /* RO */
 #define EXT_CSD_CARD_TYPE              196     /* RO */
+#define EXT_CSD_PART_SWITCH_TIME       199     /* RO */
 #define EXT_CSD_SEC_CNT                        212     /* RO, 4 bytes */
 #define EXT_CSD_HC_WP_GRP_SIZE         221     /* RO */
 #define EXT_CSD_HC_ERASE_GRP_SIZE      224     /* RO */
 #define EXT_CSD_BOOT_MULT              226     /* RO */
+#define EXT_CSD_GENERIC_CMD6_TIME       248     /* RO */
 #define EXT_CSD_BKOPS_SUPPORT          502     /* RO */
 
 /*
@@ -260,11 +268,13 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx)
 #define EXT_CSD_DDR_BUS_WIDTH_4        5       /* Card is in 4 bit DDR mode */
 #define EXT_CSD_DDR_BUS_WIDTH_8        6       /* Card is in 8 bit DDR mode */
 #define EXT_CSD_DDR_FLAG       BIT(2)  /* Flag for DDR mode */
+#define EXT_CSD_BUS_WIDTH_STROBE BIT(7)        /* Enhanced strobe mode */
 
 #define EXT_CSD_TIMING_LEGACY  0       /* no high speed */
 #define EXT_CSD_TIMING_HS      1       /* HS */
 #define EXT_CSD_TIMING_HS200   2       /* HS200 */
 #define EXT_CSD_TIMING_HS400   3       /* HS400 */
+#define EXT_CSD_DRV_STR_SHIFT  4       /* Driver Strength shift */
 
 #define EXT_CSD_BOOT_ACK_ENABLE                        (1 << 6)
 #define EXT_CSD_BOOT_PARTITION_ENABLE          (1 << 3)
@@ -414,14 +424,6 @@ struct dm_mmc_ops {
         */
        int (*set_ios)(struct udevice *dev);
 
-       /**
-        * send_init_stream() - send the initialization stream: 74 clock cycles
-        * This is used after power up before sending the first command
-        *
-        * @dev:        Device to update
-        */
-       void (*send_init_stream)(struct udevice *dev);
-
        /**
         * get_cd() - See whether a card is present
         *
@@ -449,18 +451,31 @@ struct dm_mmc_ops {
        int (*execute_tuning)(struct udevice *dev, uint opcode);
 #endif
 
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
        /**
         * wait_dat0() - wait until dat0 is in the target state
         *              (CLK must be running during the wait)
         *
         * @dev:        Device to check
         * @state:      target state
-        * @timeout:    timeout in us
+        * @timeout_us: timeout in us
         * @return 0 if dat0 is in the target state, -ve on error
         */
-       int (*wait_dat0)(struct udevice *dev, int state, int timeout);
+       int (*wait_dat0)(struct udevice *dev, int state, int timeout_us);
+
+#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
+       /* set_enhanced_strobe() - set HS400 enhanced strobe */
+       int (*set_enhanced_strobe)(struct udevice *dev);
 #endif
+
+       /**
+        * host_power_cycle - host specific tasks in power cycle sequence
+        *                    Called between mmc_power_off() and
+        *                    mmc_power_on()
+        *
+        * @dev:        Device to check
+        * @return 0 if not present, 1 if present, -ve on error
+        */
+       int (*host_power_cycle)(struct udevice *dev);
 };
 
 #define mmc_get_ops(dev)        ((struct dm_mmc_ops *)(dev)->driver->ops)
@@ -468,19 +483,20 @@ struct dm_mmc_ops {
 int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
                    struct mmc_data *data);
 int dm_mmc_set_ios(struct udevice *dev);
-void dm_mmc_send_init_stream(struct udevice *dev);
 int dm_mmc_get_cd(struct udevice *dev);
 int dm_mmc_get_wp(struct udevice *dev);
 int dm_mmc_execute_tuning(struct udevice *dev, uint opcode);
-int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout);
+int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us);
+int dm_mmc_host_power_cycle(struct udevice *dev);
 
 /* Transition functions for compatibility */
 int mmc_set_ios(struct mmc *mmc);
-void mmc_send_init_stream(struct mmc *mmc);
 int mmc_getcd(struct mmc *mmc);
 int mmc_getwp(struct mmc *mmc);
 int mmc_execute_tuning(struct mmc *mmc, uint opcode);
-int mmc_wait_dat0(struct mmc *mmc, int state, int timeout);
+int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us);
+int mmc_set_enhanced_strobe(struct mmc *mmc);
+int mmc_host_power_cycle(struct mmc *mmc);
 
 #else
 struct mmc_ops {
@@ -490,6 +506,7 @@ struct mmc_ops {
        int (*init)(struct mmc *mmc);
        int (*getcd)(struct mmc *mmc);
        int (*getwp)(struct mmc *mmc);
+       int (*host_power_cycle)(struct mmc *mmc);
 };
 #endif
 
@@ -526,6 +543,7 @@ enum bus_mode {
        UHS_SDR104,
        MMC_HS_200,
        MMC_HS_400,
+       MMC_HS_400_ES,
        MMC_MODES_END
 };
 
@@ -543,6 +561,10 @@ static inline bool mmc_is_mode_ddr(enum bus_mode mode)
 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
        else if (mode == MMC_HS_400)
                return true;
+#endif
+#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
+       else if (mode == MMC_HS_400_ES)
+               return true;
 #endif
        else
                return false;
@@ -593,6 +615,8 @@ struct mmc {
        u8 part_attr;
        u8 wr_rel_set;
        u8 part_config;
+       u8 gen_cmd6_time;       /* units: 10 ms */
+       u8 part_switch_time;    /* units: 10 ms */
        uint tran_speed;
        uint legacy_speed; /* speed for the legacy mode provided by the card */
        uint read_bl_len;
@@ -687,6 +711,7 @@ void mmc_destroy(struct mmc *mmc);
  */
 int mmc_unbind(struct udevice *dev);
 int mmc_initialize(bd_t *bis);
+int mmc_init_device(int num);
 int mmc_init(struct mmc *mmc);
 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error);
 
@@ -828,7 +853,6 @@ void mmc_set_preinit(struct mmc *mmc, int preinit);
 #else
 #define mmc_host_is_spi(mmc)   0
 #endif
-struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
 
 void board_mmc_power_init(void);
 int board_mmc_init(bd_t *bis);
@@ -839,6 +863,9 @@ extern uint mmc_get_env_part(struct mmc *mmc);
 # endif
 int mmc_get_env_dev(void);
 
+/* Minimum partition switch timeout in units of 10-milliseconds */
+#define MMC_MIN_PART_SWITCH_TIME       30 /* 300 ms */
+
 /* Set block count limit because of 16 bit register limit on some hardware*/
 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535