configs: move CONFIG_SPL_TEXT_BASE to Kconfig
[oweals/u-boot.git] / include / configs / ti_armv7_keystone2.h
index bbed17a25fa0e060894ca431d18fd30266553012..6c867671cf1adc1663aded165910b134a2554ff7 100644 (file)
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Common configuration header file for all Keystone II EVM platforms
  *
  * (C) Copyright 2012-2014
  *     Texas Instruments Incorporated, <www.ti.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #ifndef __CONFIG_KS2_EVM_H
 
 /* SoC Configuration */
 #define CONFIG_ARCH_CPU_INIT
-#define CONFIG_SYS_ARCH_TIMER
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE           0x0c000000
-#endif
 #define CONFIG_SPL_TARGET              "u-boot-spi.gph"
 #define CONFIG_SYS_DCACHE_OFF
 
 /* Memory Configuration */
-#define CONFIG_NR_DRAM_BANKS           2
 #define CONFIG_SYS_LPAE_SDRAM_BASE     0x800000000
 #define CONFIG_MAX_RAM_BANK_SIZE       (2 << 30)       /* 2GB */
-#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SPL_TEXT_BASE - \
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_ISW_ENTRY_ADDR - \
                                        GENERATED_GBL_DATA_SIZE)
 
 #ifdef CONFIG_SYS_MALLOC_F_LEN
@@ -40,7 +34,7 @@
 /* SPL SPI Loader Configuration */
 #define CONFIG_SPL_PAD_TO              65536
 #define CONFIG_SPL_MAX_SIZE            (CONFIG_SPL_PAD_TO - 8)
-#define CONFIG_SPL_BSS_START_ADDR      (CONFIG_SPL_TEXT_BASE + \
+#define CONFIG_SPL_BSS_START_ADDR      (CONFIG_ISW_ENTRY_ADDR + \
                                        CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SPL_BSS_MAX_SIZE                (32 * 1024)
 #define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SPL_BSS_START_ADDR + \
@@ -51,7 +45,6 @@
                                        CONFIG_SYS_SPL_MALLOC_SIZE + \
                                        SPL_MALLOC_F_SIZE + \
                                        KEYSTONE_SPL_STACK_SIZE - 4)
-#define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     CONFIG_SPL_PAD_TO
 
 /* SRAM scratch space entries  */
@@ -69,7 +62,6 @@
 #endif
 #define CONFIG_SYS_NS16550_COM1                KS2_UART0_BASE
 #define CONFIG_SYS_NS16550_COM2                KS2_UART1_BASE
-#define CONFIG_CONS_INDEX              1
 
 #ifndef CONFIG_SOC_K2G
 #define CONFIG_SYS_NS16550_CLK         ks_clk_get_rate(KS2_CLK1_6)
@@ -79,8 +71,6 @@
 
 /* SPI Configuration */
 #define CONFIG_SYS_SPI_CLK             ks_clk_get_rate(KS2_CLK1_6)
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_SYS_SPI0
 #define CONFIG_SYS_SPI_BASE            KS2_SPI0_BASE
 #define CONFIG_SYS_SPI0_NUM_CS         4
 #endif
 
 /* Network Configuration */
-#define CONFIG_PHY_MARVELL
-#define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT         32
 #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE   KS2_NETCP_PDMA_TX_SND_QUEUE
 
 /* Keystone net */
-#define CONFIG_DRIVER_TI_KEYSTONE_NET
 #define CONFIG_KSNET_MAC_ID_BASE               KS2_MAC_ID_BASE_ADDR
 #define CONFIG_KSNET_NETCP_BASE                        KS2_NETCP_BASE
 #define CONFIG_KSNET_SERDES_SGMII_BASE         KS2_SGMII_SERDES_BASE
 #define CONFIG_KSNET_SERDES_SGMII2_BASE                KS2_SGMII_SERDES2_BASE
 #define CONFIG_KSNET_SERDES_LANES_PER_SGMII    KS2_LANES_PER_SGMII_SERDES
 
-/* SerDes */
-#define CONFIG_TI_KEYSTONE_SERDES
-
 #define CONFIG_AEMIF_CNTRL_BASE                KS2_AEMIF_CNTRL_BASE
 
 /* I2C Configuration */
-#define CONFIG_SYS_I2C_DAVINCI
 #define CONFIG_SYS_DAVINCI_I2C_SPEED   100000
 #define CONFIG_SYS_DAVINCI_I2C_SLAVE   0x10 /* SMBus host address */
 #define CONFIG_SYS_DAVINCI_I2C_SPEED1  100000
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 
 /* NAND Configuration */
-#define CONFIG_NAND_DAVINCI
 #define CONFIG_KEYSTONE_RBL_NAND
 #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE      CONFIG_ENV_OFFSET
 #define CONFIG_SYS_NAND_MASK_CLE               0x4000
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_MAX_CHIPS              1
 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
-#define CONFIG_MTD_PARTITIONS
 
-/* USB Configuration */
-#define CONFIG_USB_XHCI_KEYSTONE
-#define CONFIG_USB_SS_BASE                     KS2_USB_SS_BASE
-#define CONFIG_USB_HOST_XHCI_BASE              KS2_USB_HOST_XHCI_BASE
-#define CONFIG_DEV_USB_PHY_BASE                        KS2_DEV_USB_PHY_BASE
-#define CONFIG_USB_PHY_CFG_BASE                        KS2_USB_PHY_CFG_BASE
+#define DFU_ALT_INFO_MMC \
+       "dfu_alt_info_mmc=" \
+       "MLO fat 0 1;" \
+       "u-boot.img fat 0 1;" \
+       "uEnv.txt fat 0 1\0"
+
+/* DFU settings */
+#define DFUARGS \
+       "dfu_bufsiz=0x10000\0" \
+       DFU_ALT_INFO_MMC \
 
 /* U-Boot general configuration */
-#define CONFIG_MISC_INIT_R
 #define CONFIG_MX_CYCLIC
 #define CONFIG_TIMESTAMP
 
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \
        DEFAULT_LINUX_BOOT_ENV                                          \
        CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS                             \
+       DFUARGS                                                         \
        "bootdir=/boot\0" \
        "tftp_root=/\0"                                                 \
        "nfs_root=/export\0"                                            \