ddr: altera: Compile ALTERA SDRAM in SPL only

[oweals/u-boot.git] / include / configs / socfpga_stratix10_socdk.h

diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h
index 0e73239f568c86e0efe12af9e47abe3ac5ab5741..b8a86f2cb20b8be2eeabed5cf76c92a3fb259021 100644 (file)
--- a/include/configs/socfpga_stratix10_socdk.h
+++ b/include/configs/socfpga_stratix10_socdk.h
@@ -60,10 +60,6 @@
 /*#define CONFIG_QSPI_RBF_ADDR         0x720000*/
 
 /* Flash device info */
-#define CONFIG_SF_DEFAULT_SPEED                (50000000)
-#define CONFIG_SF_DEFAULT_MODE         (SPI_MODE_3 | SPI_RX_QUAD)
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
 
 /*#define CONFIG_ENV_IS_IN_SPI_FLASH*/
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
@@ -136,7 +132,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 /*
  * SDRAM controller
  */
-#define CONFIG_ALTERA_SDRAM
+#define CONFIG_SPL_ALTERA_SDRAM
 
 /*
  * Serial / UART configurations
@@ -201,7 +197,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
  *
  */
 #define CONFIG_SPL_TARGET              "spl/u-boot-spl.hex"
-#define CONFIG_SPL_TEXT_BASE           CONFIG_SYS_INIT_RAM_ADDR
 #define CONFIG_SPL_MAX_SIZE            CONFIG_SYS_INIT_RAM_SIZE
 #define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR
 #define CONFIG_SPL_BSS_MAX_SIZE                0x100000        /* 1 MB */