Merge tag 'u-boot-imx-20190426' of git://git.denx.de/u-boot-imx

[oweals/u-boot.git] / include / configs / calimain.h

diff --git a/include/configs/calimain.h b/include/configs/calimain.h
index 60068d1fbb91f534fb8da3081414c3eaa450b72d..e77218466f11ef8242c31856541e8a9d7492a7eb 100644 (file)
--- a/include/configs/calimain.h
+++ b/include/configs/calimain.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2011-2014 OMICRON electronics GmbH
  *
@@ -5,8 +6,6 @@
  *
  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -15,24 +14,17 @@
 /*
  * Board
  */
-#define CONFIG_DRIVER_TI_EMAC
 #define CONFIG_MACH_TYPE       MACH_TYPE_CALIMAIN
 
 /*
  * SoC Configuration
  */
-#define CONFIG_MACH_DAVINCI_CALIMAIN
-#define CONFIG_SOC_DA8XX               /* TI DA8xx SoC */
-#define CONFIG_SOC_DA850               /* TI DA850 SoC */
 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
 #define CONFIG_SYS_CLK_FREQ            clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ          calimain_get_osc_freq()
 #define CONFIG_SYS_TIMERBASE           DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK            clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_TEXT_BASE           0x60000000
-#define CONFIG_DA850_LOWLEVEL
 #define CONFIG_ARCH_CPU_INIT
-#define CONFIG_DA8XX_GPIO
 #define CONFIG_HW_WATCHDOG
 #define CONFIG_SYS_WDTTIMERBASE        DAVINCI_TIMER1_BASE
 #define CONFIG_SYS_WDT_PERIOD_LOW \
@@ -43,20 +35,6 @@
 /*
  * PLL configuration
  */
-#define CONFIG_SYS_DV_CLKMODE          0
-#define CONFIG_SYS_DA850_PLL0_POSTDIV  1
-#define CONFIG_SYS_DA850_PLL0_PLLDIV1  0x8000
-#define CONFIG_SYS_DA850_PLL0_PLLDIV2  0x8001
-#define CONFIG_SYS_DA850_PLL0_PLLDIV3  0x8002
-#define CONFIG_SYS_DA850_PLL0_PLLDIV4  0x8003
-#define CONFIG_SYS_DA850_PLL0_PLLDIV5  0x8002
-#define CONFIG_SYS_DA850_PLL0_PLLDIV6  CONFIG_SYS_DA850_PLL0_PLLDIV1
-#define CONFIG_SYS_DA850_PLL0_PLLDIV7  0x8005
-
-#define CONFIG_SYS_DA850_PLL1_POSTDIV  1
-#define CONFIG_SYS_DA850_PLL1_PLLDIV1  0x8000
-#define CONFIG_SYS_DA850_PLL1_PLLDIV2  0x8001
-#define CONFIG_SYS_DA850_PLL1_PLLDIV3  0x8002
 
 #define CONFIG_SYS_DA850_PLL0_PLLM \
        ((calimain_get_osc_freq() == 25000000) ? 23 : 24)
@@ -143,8 +121,6 @@
 /* memtest will be run on 16MB */
 #define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START + (16 << 20))
 
-#define CONFIG_NR_DRAM_BANKS   1 /* we have 1 bank of DRAM */
-
 /*
  * Serial Driver info
  */
@@ -152,12 +128,7 @@
 #define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size */
 #define CONFIG_SYS_NS16550_COM1        DAVINCI_UART2_BASE /* Base address of UART2 */
 #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX      1               /* use UART0 for console */
 
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_PROTECTION
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 #define CONFIG_SYS_MAX_FLASH_BANKS  1 /* max number of flash banks */
 #define CONFIG_SYS_FLASH_SECT_SZ    (128 << 10) /* 128KB */
 #define CONFIG_SYS_FLASH_BASE       DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
@@ -175,8 +146,6 @@
  * Network & Ethernet Configuration
  */
 #ifdef CONFIG_DRIVER_TI_EMAC
-#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT 10
@@ -190,9 +159,6 @@
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
 #define CONFIG_SYS_LOAD_ADDR   (PHYS_SDRAM_1 + 0x700000)
 #define CONFIG_LOADADDR        0xc0700000
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
 #define CONFIG_MX_CYCLIC
 
 /*
@@ -281,7 +247,6 @@
        "verify=n\0"                                                    \
        "clearenv=protect off all;"                                     \
                "erase 0x60040000 +0x40000;\0"                          \
-       "bootlimit=3\0"                                                 \
        "altbootcmd=run bootrlk\0"
 
 #define CONFIG_PREBOOT                 \
@@ -296,9 +261,7 @@
 /* initial stack pointer in internal SRAM */
 #define CONFIG_SYS_INIT_SP_ADDR                (0x8001ff00)
 
-#define CONFIG_BOOTCOUNT_LIMIT
 #define CONFIG_SYS_BOOTCOUNT_LE                /* Use little-endian accessors */
-#define CONFIG_SYS_BOOTCOUNT_ADDR      DAVINCI_RTC_BASE
 
 #ifndef __ASSEMBLY__
 int calimain_get_osc_freq(void);