Merge branch 'master' of git://git.denx.de/u-boot-sh

[oweals/u-boot.git] / include / configs / MPC8569MDS.h

diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index a7eccb4501797bff83e4c15d96998aaec9ec03cb..3c6661fc836daaf75cacae5e85893e200f2e5996 100644 (file)
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2009-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -18,7 +17,6 @@
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
-#define CONFIG_QE                      /* Enable QE */
 #define CONFIG_ENV_OVERWRITE
 
 #ifndef __ASSEMBLY__
@@ -48,7 +46,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_ENABLE_36BIT_PHYS       1
 
-#define CONFIG_BOARD_EARLY_INIT_R      1
 #define CONFIG_HWCONFIG
 
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
@@ -70,7 +67,6 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
@@ -153,8 +149,6 @@ extern unsigned long get_clock_freq(void);
 
 #undef CONFIG_SYS_RAMBOOT
 
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_FLASH_EMPTY_INFO
 
 /* Chip select 3 - NAND */
@@ -214,7 +208,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_MALLOC_LEN  (512 * 1024)    /* Reserved for malloc */
 
 /* Serial Port */
-#define CONFIG_CONS_INDEX              1
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
@@ -428,21 +421,16 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change */
 
 /* QE microcode/firmware address */
-#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 #define CONFIG_SYS_QE_FW_ADDR  0xfff00000
 
 /*
  * BOOTP options
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
 
 #undef CONFIG_WATCHDOG                 /* watchdog disabled */
 
 #ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC
 #define CONFIG_FSL_ESDHC_PIN_MUX
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #endif
@@ -450,9 +438,6 @@ extern unsigned long get_clock_freq(void);
 /*
  * Miscellaneous configurable options
  */
-#define CONFIG_SYS_LONGHELP                    /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING                 /* Command-line editing */
-#define CONFIG_AUTO_COMPLETE                   /* add autocompletion support */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE      2048            /* Console I/O Buffer Size */
@@ -478,7 +463,7 @@ extern unsigned long get_clock_freq(void);
 /*
  * Environment Configuration
  */
-#define CONFIG_HOSTNAME mpc8569mds
+#define CONFIG_HOSTNAME "mpc8569mds"
 #define CONFIG_ROOTPATH  "/nfsroot"
 #define CONFIG_BOOTFILE  "your.uImage"