Merge with git://www.denx.de/git/u-boot.git

[oweals/u-boot.git] / include / configs / MPC8568MDS.h

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index dc9cb1ff54550fc98fd830d433da2f4fa3098f3f..ba744e99f8d3d0e6437a100570bef7d763c87df9 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -35,7 +35,7 @@
 
 #define CONFIG_PCI
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
-#undef CONFIG_QE                       /* Enable QE */
+#define CONFIG_QE                      /* Enable QE */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_DLL                 /* possible DLL fix needed */
@@ -63,9 +63,9 @@ extern unsigned long get_clock_freq(void);
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-/*#define CONFIG_L2_CACHE*/                        /* toggle L2 cache  */
-#define CONFIG_BTB                                             /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING              /* toggle addr streaming   */
+#define CONFIG_L2_CACHE                                /* toggle L2 cache      */
+#define CONFIG_BTB                             /* toggle branch predition */
+#define CONFIG_ADDR_STREAMING                  /* toggle addr streaming   */
 
 /*
  * Only possible on E500 Version 2 or newer cores.
@@ -293,9 +293,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_OF_FLAT_TREE    1
 #define CONFIG_OF_BOARD_SETUP  1
 
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE  8192
-
 #define OF_CPU                 "PowerPC,8568@0"
 #define OF_SOC                 "soc8568@e0000000"
 #define OF_QE                  "qe@e0080000"
@@ -348,7 +345,7 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_UEC_ETH
 #ifndef CONFIG_TSEC_ENET
-#define CONFIG_ETHPRIME         "Freescale GETH"
+#define CONFIG_ETHPRIME         "FSL UEC0"
 #endif
 #define CONFIG_PHY_MODE_NEED_CHANGE
 #define CONFIG_eTSEC_MDIO_BUS
@@ -399,9 +396,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_TSEC1_NAME      "eTSEC0"
 #define CONFIG_TSEC2   1
 #define CONFIG_TSEC2_NAME      "eTSEC1"
-#undef  CONFIG_TSEC3
-#undef  CONFIG_TSEC4
-#undef  CONFIG_MPC85XX_FEC
 
 #define TSEC1_PHY_ADDR         2
 #define TSEC2_PHY_ADDR         3
@@ -409,7 +403,10 @@ extern unsigned long get_clock_freq(void);
 #define TSEC1_PHYIDX           0
 #define TSEC2_PHYIDX           0
 
-/* Options are: eTSEC[0-3] */
+#define TSEC1_FLAGS            TSEC_GIGABIT
+#define TSEC2_FLAGS            TSEC_GIGABIT
+
+/* Options are: eTSEC[0-1] */
 #define CONFIG_ETHPRIME                "eTSEC0"
 
 #endif /* CONFIG_TSEC_ENET */