Add support for 64-bit MIPS to examples/standalone

[oweals/u-boot.git] / examples / standalone / stubs.c

diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index 920a0a9cf3b4ae96c2ba3aa21394dde4fd50318b..0d62067e03be4cbf97e1cd8c38adf503f9120700 100644 (file)
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -65,6 +65,23 @@ gd_t *global_data;
        : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "ip");
 #endif
 #elif defined(CONFIG_MIPS)
+#ifdef CONFIG_CPU_MIPS64
+/*
+ * k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
+ * clobbered register that is also used to set gp ($26). Note that the
+ * jr instruction also executes the instruction immediately following
+ * it; however, GCC/mips generates an additional `nop' after each asm
+ * statement
+ */
+#define EXPORT_FUNC(f, a, x, ...) \
+       asm volatile (                  \
+"      .globl " #x "\n"                \
+#x ":\n"                               \
+"      ld      $25, %0($26)\n"         \
+"      ld      $25, %1($25)\n"         \
+"      jr      $25\n"                  \
+        : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
+#else
 /*
  * k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
  * clobbered register that is also used to set gp ($26). Note that the
@@ -80,6 +97,7 @@ gd_t *global_data;
 "      lw      $25, %1($25)\n"         \
 "      jr      $25\n"                  \
        : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
+#endif
 #elif defined(CONFIG_NIOS2)
 /*
  * gp holds the pointer to the global_data, r8 is call-clobbered