common: Move hang() to the same header as panic()

[oweals/u-boot.git] / drivers / watchdog / imx_watchdog.c

diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
index 14cc618074bd84f312b502c16cc01389d8095b42..01762df019bfd2def99ef5382dbe858d5aa9b79f 100644 (file)
--- a/drivers/watchdog/imx_watchdog.c
+++ b/drivers/watchdog/imx_watchdog.c
@@ -5,7 +5,11 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
+#include <dm.h>
+#include <hang.h>
 #include <asm/io.h>
+#include <wdt.h>
 #include <watchdog.h>
 #include <asm/arch/imx-regs.h>
 #ifdef CONFIG_FSL_LSCH2
@@ -13,21 +17,50 @@
 #endif
 #include <fsl_wdog.h>
 
-#ifdef CONFIG_IMX_WATCHDOG
-void hw_watchdog_reset(void)
+static void imx_watchdog_expire_now(struct watchdog_regs *wdog, bool ext_reset)
+{
+       u16 wcr = WCR_WDE;
+
+       if (ext_reset)
+               wcr |= WCR_SRS; /* do not assert internal reset */
+       else
+               wcr |= WCR_WDA; /* do not assert external reset */
+
+       /* Write 3 times to ensure it works, due to IMX6Q errata ERR004346 */
+       writew(wcr, &wdog->wcr);
+       writew(wcr, &wdog->wcr);
+       writew(wcr, &wdog->wcr);
+
+       while (1) {
+               /*
+                * spin before reset
+                */
+       }
+}
+
+#if !defined(CONFIG_IMX_WATCHDOG) || \
+    (defined(CONFIG_IMX_WATCHDOG) && !CONFIG_IS_ENABLED(WDT))
+void __attribute__((weak)) reset_cpu(ulong addr)
 {
-#ifndef CONFIG_WATCHDOG_RESET_DISABLE
        struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
 
+       imx_watchdog_expire_now(wdog, true);
+}
+#endif
+
+#if defined(CONFIG_IMX_WATCHDOG)
+static void imx_watchdog_reset(struct watchdog_regs *wdog)
+{
+#ifndef CONFIG_WATCHDOG_RESET_DISABLE
        writew(0x5555, &wdog->wsr);
        writew(0xaaaa, &wdog->wsr);
 #endif /* CONFIG_WATCHDOG_RESET_DISABLE*/
 }
 
-void hw_watchdog_init(void)
+static void imx_watchdog_init(struct watchdog_regs *wdog, bool ext_reset)
 {
-       struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
        u16 timeout;
+       u16 wcr;
 
        /*
         * The timer watchdog can be set between
@@ -39,26 +72,97 @@ void hw_watchdog_init(void)
 #endif
        timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
 #ifdef CONFIG_FSL_LSCH2
-       writew((WCR_WDA | WCR_SRS | WCR_WDE) << 8 | timeout, &wdog->wcr);
+       wcr = (WCR_WDA | WCR_SRS | WCR_WDE) << 8 | timeout;
 #else
-       writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS |
-               WCR_WDA | SET_WCR_WT(timeout), &wdog->wcr);
+       wcr = WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_SRS |
+               WCR_WDA | SET_WCR_WT(timeout);
+       if (ext_reset)
+               wcr |= WCR_WDT;
 #endif /* CONFIG_FSL_LSCH2*/
-       hw_watchdog_reset();
+       writew(wcr, &wdog->wcr);
+       imx_watchdog_reset(wdog);
 }
-#endif
 
-void __attribute__((weak)) reset_cpu(ulong addr)
+#if !CONFIG_IS_ENABLED(WDT)
+void hw_watchdog_reset(void)
 {
        struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
 
-       clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE);
+       imx_watchdog_reset(wdog);
+}
 
-       writew(0x5555, &wdog->wsr);
-       writew(0xaaaa, &wdog->wsr);     /* load minimum 1/2 second timeout */
-       while (1) {
-               /*
-                * spin for .5 seconds before reset
-                */
-       }
+void hw_watchdog_init(void)
+{
+       struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+
+       imx_watchdog_init(wdog, true);
+}
+#else
+struct imx_wdt_priv {
+       void __iomem *base;
+       bool ext_reset;
+};
+
+static int imx_wdt_reset(struct udevice *dev)
+{
+       struct imx_wdt_priv *priv = dev_get_priv(dev);
+
+       imx_watchdog_reset(priv->base);
+
+       return 0;
+}
+
+static int imx_wdt_expire_now(struct udevice *dev, ulong flags)
+{
+       struct imx_wdt_priv *priv = dev_get_priv(dev);
+
+       imx_watchdog_expire_now(priv->base, priv->ext_reset);
+       hang();
+
+       return 0;
+}
+
+static int imx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+       struct imx_wdt_priv *priv = dev_get_priv(dev);
+
+       imx_watchdog_init(priv->base, priv->ext_reset);
+
+       return 0;
 }
+
+static int imx_wdt_probe(struct udevice *dev)
+{
+       struct imx_wdt_priv *priv = dev_get_priv(dev);
+
+       priv->base = dev_read_addr_ptr(dev);
+       if (!priv->base)
+               return -ENOENT;
+
+       priv->ext_reset = dev_read_bool(dev, "fsl,ext-reset-output");
+
+       return 0;
+}
+
+static const struct wdt_ops imx_wdt_ops = {
+       .start          = imx_wdt_start,
+       .reset          = imx_wdt_reset,
+       .expire_now     = imx_wdt_expire_now,
+};
+
+static const struct udevice_id imx_wdt_ids[] = {
+       { .compatible = "fsl,imx21-wdt" },
+       {}
+};
+
+U_BOOT_DRIVER(imx_wdt) = {
+       .name           = "imx_wdt",
+       .id             = UCLASS_WDT,
+       .of_match       = imx_wdt_ids,
+       .probe          = imx_wdt_probe,
+       .ops            = &imx_wdt_ops,
+       .priv_auto_alloc_size = sizeof(struct imx_wdt_priv),
+       .flags          = DM_FLAG_PRE_RELOC,
+};
+#endif
+#endif