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video: fsl_dcu_fb: refactor init functions
[oweals/u-boot.git] / drivers / video / fsl_dcu_fb.c
diff --git a/drivers/video/fsl_dcu_fb.c b/drivers/video/fsl_dcu_fb.c
index 9f6e7f83b0fda882cc6a1d801aefcd1315304a38..f789ec597d3d3de03560eec1d28d31af158a3e25 100644 (file)
--- a/drivers/video/fsl_dcu_fb.c
+++ b/drivers/video/fsl_dcu_fb.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2019 Toradex AG
  *
  * FSL DCU Framebuffer driver
  */
@@ -240,20 +241,22 @@ static void reset_total_layers(void)
        }
 }
 
-static int layer_ctrldesc_init(int index, u32 pixel_format)
+static int layer_ctrldesc_init(struct fb_info fbinfo,
+                              int index, u32 pixel_format)
 {
        struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR;
        unsigned int bpp = BPP_24_RGB888;
 
        dcu_write32(&regs->ctrldescl[index][0],
-                   DCU_CTRLDESCLN_1_HEIGHT(info.var.yres) |
-                   DCU_CTRLDESCLN_1_WIDTH(info.var.xres));
+                   DCU_CTRLDESCLN_1_HEIGHT(fbinfo.var.yres) |
+                   DCU_CTRLDESCLN_1_WIDTH(fbinfo.var.xres));
 
        dcu_write32(&regs->ctrldescl[index][1],
                    DCU_CTRLDESCLN_2_POSY(0) |
                    DCU_CTRLDESCLN_2_POSX(0));
 
-       dcu_write32(&regs->ctrldescl[index][2], (unsigned int)info.screen_base);
+       dcu_write32(&regs->ctrldescl[index][2],
+                   (unsigned int)fbinfo.screen_base);
 
        switch (pixel_format) {
        case 16:
@@ -294,42 +297,42 @@ static int layer_ctrldesc_init(int index, u32 pixel_format)
        return 0;
 }
 
-int fsl_dcu_init(unsigned int xres, unsigned int yres,
-                unsigned int pixel_format)
+int fsl_dcu_init(struct fb_info *fbinfo, unsigned int xres,
+                unsigned int yres, unsigned int pixel_format)
 {
        struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR;
        unsigned int div, mode;
 
-       info.screen_size =
-               info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8);
+       fbinfo->screen_size = fbinfo->var.xres * fbinfo->var.yres *
+                            (fbinfo->var.bits_per_pixel / 8);
 
-       if (info.screen_size > CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB) {
-               info.screen_size = 0;
+       if (fbinfo->screen_size > CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB) {
+               fbinfo->screen_size = 0;
                return -ENOMEM;
        }
 
        /* Reserve framebuffer at the end of memory */
        gd->fb_base = gd->bd->bi_dram[0].start +
-                       gd->bd->bi_dram[0].size - info.screen_size;
-       info.screen_base = (char *)gd->fb_base;
+                       gd->bd->bi_dram[0].size - fbinfo->screen_size;
+       fbinfo->screen_base = (char *)gd->fb_base;
 
-       memset(info.screen_base, 0, info.screen_size);
+       memset(fbinfo->screen_base, 0, fbinfo->screen_size);
 
        reset_total_layers();
 
        dcu_write32(&regs->disp_size,
-                   DCU_DISP_SIZE_DELTA_Y(info.var.yres) |
-                   DCU_DISP_SIZE_DELTA_X(info.var.xres / 16));
+                   DCU_DISP_SIZE_DELTA_Y(fbinfo->var.yres) |
+                   DCU_DISP_SIZE_DELTA_X(fbinfo->var.xres / 16));
 
        dcu_write32(&regs->hsyn_para,
-                   DCU_HSYN_PARA_BP(info.var.left_margin) |
-                   DCU_HSYN_PARA_PW(info.var.hsync_len) |
-                   DCU_HSYN_PARA_FP(info.var.right_margin));
+                   DCU_HSYN_PARA_BP(fbinfo->var.left_margin) |
+                   DCU_HSYN_PARA_PW(fbinfo->var.hsync_len) |
+                   DCU_HSYN_PARA_FP(fbinfo->var.right_margin));
 
        dcu_write32(&regs->vsyn_para,
-                   DCU_VSYN_PARA_BP(info.var.upper_margin) |
-                   DCU_VSYN_PARA_PW(info.var.vsync_len) |
-                   DCU_VSYN_PARA_FP(info.var.lower_margin));
+                   DCU_VSYN_PARA_BP(fbinfo->var.upper_margin) |
+                   DCU_VSYN_PARA_PW(fbinfo->var.vsync_len) |
+                   DCU_VSYN_PARA_FP(fbinfo->var.lower_margin));
 
        dcu_write32(&regs->synpol,
                    DCU_SYN_POL_INV_PXCK_FALL |
@@ -352,9 +355,9 @@ int fsl_dcu_init(unsigned int xres, unsigned int yres,
        mode = dcu_read32(&regs->mode);
        dcu_write32(&regs->mode, mode | DCU_MODE_NORMAL);
 
-       layer_ctrldesc_init(0, pixel_format);
+       layer_ctrldesc_init(*fbinfo, 0, pixel_format);
 
-       div = dcu_set_pixel_clock(info.var.pixclock);
+       div = dcu_set_pixel_clock(fbinfo->var.pixclock);
        dcu_write32(&regs->div_ratio, (div - 1));
 
        dcu_write32(&regs->update_mode, DCU_UPDATE_MODE_READREG);
@@ -367,24 +370,26 @@ ulong board_get_usable_ram_top(ulong total_size)
        return gd->ram_top - CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB;
 }
 
-void *video_hw_init(void)
+int fsl_probe_common(struct fb_info *fbinfo, unsigned int *win_x,
+                    unsigned int *win_y)
 {
-       static GraphicDevice ctfb;
        const char *options;
        unsigned int depth = 0, freq = 0;
+
        struct fb_videomode *fsl_dcu_mode_db = &fsl_dcu_mode_480_272;
 
-       if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq,
+       if (!video_get_video_mode(win_x, win_y, &depth, &freq,
                                  &options))
-               return NULL;
+               return -EINVAL;
 
        /* Find the monitor port, which is a required option */
        if (!options)
-               return NULL;
+               return -EINVAL;
+
        if (strncmp(options, "monitor=", 8) != 0)
-               return NULL;
+               return -EINVAL;
 
-       switch (RESOLUTION(ctfb.winSizeX, ctfb.winSizeY)) {
+       switch (RESOLUTION(*win_x, *win_y)) {
        case RESOLUTION(480, 272):
                fsl_dcu_mode_db = &fsl_dcu_mode_480_272;
                break;
@@ -402,25 +407,33 @@ void *video_hw_init(void)
                break;
        default:
                printf("unsupported resolution %ux%u\n",
-                      ctfb.winSizeX, ctfb.winSizeY);
+                      *win_x, *win_y);
        }
 
-       info.var.xres = fsl_dcu_mode_db->xres;
-       info.var.yres = fsl_dcu_mode_db->yres;
-       info.var.bits_per_pixel = 32;
-       info.var.pixclock = fsl_dcu_mode_db->pixclock;
-       info.var.left_margin = fsl_dcu_mode_db->left_margin;
-       info.var.right_margin = fsl_dcu_mode_db->right_margin;
-       info.var.upper_margin = fsl_dcu_mode_db->upper_margin;
-       info.var.lower_margin = fsl_dcu_mode_db->lower_margin;
-       info.var.hsync_len = fsl_dcu_mode_db->hsync_len;
-       info.var.vsync_len = fsl_dcu_mode_db->vsync_len;
-       info.var.sync = fsl_dcu_mode_db->sync;
-       info.var.vmode = fsl_dcu_mode_db->vmode;
-       info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8;
-
-       if (platform_dcu_init(ctfb.winSizeX, ctfb.winSizeY,
-                             options + 8, fsl_dcu_mode_db) < 0)
+       fbinfo->var.xres = fsl_dcu_mode_db->xres;
+       fbinfo->var.yres = fsl_dcu_mode_db->yres;
+       fbinfo->var.bits_per_pixel = 32;
+       fbinfo->var.pixclock = fsl_dcu_mode_db->pixclock;
+       fbinfo->var.left_margin = fsl_dcu_mode_db->left_margin;
+       fbinfo->var.right_margin = fsl_dcu_mode_db->right_margin;
+       fbinfo->var.upper_margin = fsl_dcu_mode_db->upper_margin;
+       fbinfo->var.lower_margin = fsl_dcu_mode_db->lower_margin;
+       fbinfo->var.hsync_len = fsl_dcu_mode_db->hsync_len;
+       fbinfo->var.vsync_len = fsl_dcu_mode_db->vsync_len;
+       fbinfo->var.sync = fsl_dcu_mode_db->sync;
+       fbinfo->var.vmode = fsl_dcu_mode_db->vmode;
+       fbinfo->fix.line_length = fbinfo->var.xres *
+                                 fbinfo->var.bits_per_pixel / 8;
+
+       return platform_dcu_init(fbinfo, *win_x, *win_y,
+                                options + 8, fsl_dcu_mode_db);
+}
+
+void *video_hw_init(void)
+{
+       static GraphicDevice ctfb;
+
+       if (fsl_probe_common(&info, &ctfb.winSizeX, &ctfb.winSizeY) < 0)
                return NULL;
 
        ctfb.frameAdrs = (unsigned int)info.screen_base;
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