Merge branch '2020-06-15-misc-bugfixes'
[oweals/u-boot.git] / drivers / pci / pci_auto_old.c
index 932eab85bf5629bdd8f0435701bb249bba03427c..8b67cfa92b41b3e4850adbdd51c3861ab8ff55e1 100644 (file)
@@ -1,19 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
- * arch/powerpc/kernel/pci_auto.c
- *
- * PCI autoconfiguration library
+ * PCI autoconfiguration library (legacy version, do not change)
  *
  * Author: Matt Porter <mporter@mvista.com>
  *
  * Copyright 2000 MontaVista Software Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <pci.h>
 
+/*
+ * Do not change this file. Instead, convert your board to use CONFIG_DM_PCI
+ * and change pci_auto.c.
+ */
+
 /* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */
 #ifndef CONFIG_SYS_PCI_CACHE_LINE_SIZE
 #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 8
@@ -98,15 +101,16 @@ void pciauto_setup_device(struct pci_controller *hose,
                                bar_res = prefetch;
                        else
                                bar_res = mem;
-#endif
 
                        debug("PCI Autoconfig: BAR %d, %s, size=0x%llx, ",
                              bar_nr, bar_res == prefetch ? "Prf" : "Mem",
                              (unsigned long long)bar_size);
+#endif
                }
 
 #ifndef CONFIG_PCI_ENUM_ONLY
-               if (pciauto_region_allocate(bar_res, bar_size, &bar_value) == 0) {
+               if (pciauto_region_allocate(bar_res, bar_size,
+                                           &bar_value, found_mem64) == 0) {
                        /* Write it out and update our limit */
                        pci_hose_write_config_dword(hose, dev, bar, (u32)bar_value);
 
@@ -148,7 +152,7 @@ void pciauto_setup_device(struct pci_controller *hose,
                        debug("PCI Autoconfig: ROM, size=%#x, ",
                              (unsigned int)bar_size);
                        if (pciauto_region_allocate(mem, bar_size,
-                                                   &bar_value) == 0) {
+                                                   &bar_value, false) == 0) {
                                pci_hose_write_config_dword(hose, dev, rom_addr,
                                                            bar_value);
                        }
@@ -177,18 +181,9 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
        struct pci_region *pci_io;
        u16 cmdstat, prefechable_64;
 
-#ifdef CONFIG_DM_PCI
-       /* The root controller has the region information */
-       struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
-
-       pci_mem = ctlr_hose->pci_mem;
-       pci_prefetch = ctlr_hose->pci_prefetch;
-       pci_io = ctlr_hose->pci_io;
-#else
        pci_mem = hose->pci_mem;
        pci_prefetch = hose->pci_prefetch;
        pci_io = hose->pci_io;
-#endif
 
        pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
        pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
@@ -196,15 +191,10 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
        prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
 
        /* Configure bus number registers */
-#ifdef CONFIG_DM_PCI
-       pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev));
-       pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus);
-#else
        pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
                                   PCI_BUS(dev) - hose->first_busno);
        pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS,
                                   sub_bus - hose->first_busno);
-#endif
        pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);
 
        if (pci_mem) {
@@ -271,26 +261,13 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose,
        struct pci_region *pci_prefetch;
        struct pci_region *pci_io;
 
-#ifdef CONFIG_DM_PCI
-       /* The root controller has the region information */
-       struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
-
-       pci_mem = ctlr_hose->pci_mem;
-       pci_prefetch = ctlr_hose->pci_prefetch;
-       pci_io = ctlr_hose->pci_io;
-#else
        pci_mem = hose->pci_mem;
        pci_prefetch = hose->pci_prefetch;
        pci_io = hose->pci_io;
-#endif
 
        /* Configure bus number registers */
-#ifdef CONFIG_DM_PCI
-       pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, sub_bus);
-#else
        pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS,
                                   sub_bus - hose->first_busno);
-#endif
 
        if (pci_mem) {
                /* Round memory allocator to 1MB boundary */
@@ -350,18 +327,9 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
        unsigned short class;
        int n;
 
-#ifdef CONFIG_DM_PCI
-       /* The root controller has the region information */
-       struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
-
-       pci_mem = ctlr_hose->pci_mem;
-       pci_prefetch = ctlr_hose->pci_prefetch;
-       pci_io = ctlr_hose->pci_io;
-#else
        pci_mem = hose->pci_mem;
        pci_prefetch = hose->pci_prefetch;
        pci_io = hose->pci_io;
-#endif
 
        pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
 
@@ -373,12 +341,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
                pciauto_setup_device(hose, dev, 2, pci_mem,
                                     pci_prefetch, pci_io);
 
-#ifdef CONFIG_DM_PCI
-               n = dm_pci_hose_probe_bus(hose, dev);
-               if (n < 0)
-                       return n;
-               sub_bus = (unsigned int)n;
-#else
                /* Passing in current_busno allows for sibling P2P bridges */
                hose->current_busno++;
                pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);
@@ -393,7 +355,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
                pciauto_postscan_setup_bridge(hose, dev, sub_bus);
 
                sub_bus = hose->current_busno;
-#endif
                break;
 
        case PCI_CLASS_BRIDGE_CARDBUS:
@@ -407,9 +368,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
                debug("PCI Autoconfig: Found P2CardBus bridge, device %d\n",
                      PCI_DEV(dev));
 
-#ifndef CONFIG_DM_PCI
                hose->current_busno++;
-#endif
                break;
 
 #if defined(CONFIG_PCIAUTO_SKIP_HOST_BRIDGE)
@@ -418,7 +377,8 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
                      PCI_DEV(dev));
                break;
 #endif
-#if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
+#if defined(CONFIG_ARCH_MPC834X) && !defined(CONFIG_TARGET_VME8349) && \
+               !defined(CONFIG_TARGET_CADDY2)
        case PCI_CLASS_BRIDGE_OTHER:
                /*
                 * The host/PCI bridge 1 seems broken in 8349 - it presents