+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Roy Zang <tie-fei.zang@freescale.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/* MAXFRM - maximum frame length */
#define MAXFRM_MASK 0x0000ffff
#include <common.h>
+#include <log.h>
#include <phy.h>
#include <asm/types.h>
#include <asm/io.h>
-#include <asm/fsl_enet.h>
-#include <asm/fsl_memac.h>
+#include <fsl_memac.h>
#include "fm.h"
{
struct memac *regs = mac->base;
- setbits_be32(®s->command_config, MEMAC_CMD_CFG_RXTX_EN);
+ setbits_be32(®s->command_config,
+ MEMAC_CMD_CFG_RXTX_EN | MEMAC_CMD_CFG_NO_LEN_CHK);
}
static void memac_disable_mac(struct fsl_enet_mac *mac)
if_mode |= IF_MODE_GMII;
break;
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
if_mode |= (IF_MODE_GMII | IF_MODE_RG);
break;
case PHY_INTERFACE_MODE_RMII:
if_mode |= (IF_MODE_GMII | IF_MODE_RM);
break;
case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_SGMII_2500:
+ case PHY_INTERFACE_MODE_QSGMII:
if_mode &= ~IF_MODE_MASK;
if_mode |= (IF_MODE_GMII);
break;
+ case PHY_INTERFACE_MODE_XGMII:
+ if_mode &= ~IF_MODE_MASK;
+ if_mode |= IF_MODE_XGMII;
+ break;
default:
break;
}
- /* Enable automatic speed selection */
- if_mode |= IF_MODE_EN_AUTO;
-
- if (type == PHY_INTERFACE_MODE_RGMII) {
+ /* Enable automatic speed selection for Non-XGMII */
+ if (type != PHY_INTERFACE_MODE_XGMII)
+ if_mode |= IF_MODE_EN_AUTO;
+
+ if (type == PHY_INTERFACE_MODE_RGMII ||
+ type == PHY_INTERFACE_MODE_RGMII_ID ||
+ type == PHY_INTERFACE_MODE_RGMII_RXID ||
+ type == PHY_INTERFACE_MODE_RGMII_TXID) {
if_mode &= ~IF_MODE_EN_AUTO;
if_mode &= ~IF_MODE_SETSP_MASK;
switch (speed) {
void init_memac(struct fsl_enet_mac *mac, void *base,
void *phyregs, int max_rx_len)
{
+ debug("%s: @ %p, mdio @ %p\n", __func__, base, phyregs);
mac->base = base;
mac->phyregs = phyregs;
mac->max_rx_len = max_rx_len;