#include <cpu.h>
#include <dm.h>
#include <thermal.h>
+#include <asm/system.h>
#include <asm/arch/sci/sci.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch-imx/cpu.h>
#include <asm/armv8/cpu.h>
+#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
const char *name;
const char *rev;
const char *type;
+ u32 cpu_rsrc;
u32 cpurev;
u32 freq_mhz;
u32 mpidr;
return "A";
case CHIP_REV_B:
return "B";
+ case CHIP_REV_C:
+ return "C";
default:
return "?";
}
}
-const char *get_core_name(void)
+static void set_core_data(struct udevice *dev)
{
- if (is_cortex_a35())
- return "A35";
- else if (is_cortex_a53())
- return "A53";
- else if (is_cortex_a72())
- return "A72";
- else
- return "?";
+ struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+
+ if (device_is_compatible(dev, "arm,cortex-a35")) {
+ plat->cpu_rsrc = SC_R_A35;
+ plat->name = "A35";
+ } else if (device_is_compatible(dev, "arm,cortex-a53")) {
+ plat->cpu_rsrc = SC_R_A53;
+ plat->name = "A53";
+ } else if (device_is_compatible(dev, "arm,cortex-a72")) {
+ plat->cpu_rsrc = SC_R_A72;
+ plat->name = "A72";
+ } else {
+ plat->cpu_rsrc = SC_R_A53;
+ plat->name = "?";
+ }
}
#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(void)
+static int cpu_imx_get_temp(struct cpu_imx_platdata *plat)
{
struct udevice *thermal_dev;
int cpu_tmp, ret;
+ int idx = 1; /* use "cpu-thermal0" device */
- ret = uclass_get_device_by_name(UCLASS_THERMAL, "cpu-thermal0",
- &thermal_dev);
+ if (plat->cpu_rsrc == SC_R_A72)
+ idx = 2; /* use "cpu-thermal1" device */
+ ret = uclass_get_device(UCLASS_THERMAL, idx, &thermal_dev);
if (!ret) {
ret = thermal_get_temp(thermal_dev, &cpu_tmp);
if (ret)
return cpu_tmp;
}
#else
-static int cpu_imx_get_temp(void)
+static int cpu_imx_get_temp(struct cpu_imx_platdata *plat)
{
return 0;
}
int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
{
struct cpu_imx_platdata *plat = dev_get_platdata(dev);
- int ret;
+ int ret, temp;
if (size < 100)
return -ENOSPC;
plat->type, plat->rev, plat->name, plat->freq_mhz);
if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
+ temp = cpu_imx_get_temp(plat);
buf = buf + ret;
size = size - ret;
- ret = snprintf(buf, size, " at %dC", cpu_imx_get_temp());
+ if (temp != 0xdeadbeef)
+ ret = snprintf(buf, size, " at %dC", temp);
+ else
+ ret = snprintf(buf, size, " - invalid sensor data");
}
snprintf(buf + ret, size - ret, "\n");
{ }
};
-static ulong imx8_get_cpu_rate(void)
+static ulong imx8_get_cpu_rate(struct udevice *dev)
{
+ struct cpu_imx_platdata *plat = dev_get_platdata(dev);
ulong rate;
int ret;
- int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ?
- SC_R_A53 : SC_R_A72;
- ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
+ ret = sc_pm_get_clock_rate(-1, plat->cpu_rsrc, SC_PM_CLK_CPU,
(sc_pm_clock_rate_t *)&rate);
if (ret) {
printf("Could not read CPU frequency: %d\n", ret);
struct cpu_imx_platdata *plat = dev_get_platdata(dev);
u32 cpurev;
+ set_core_data(dev);
cpurev = get_cpu_rev();
plat->cpurev = cpurev;
- plat->name = get_core_name();
plat->rev = get_imx8_rev(cpurev & 0xFFF);
plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
- plat->freq_mhz = imx8_get_cpu_rate() / 1000000;
+ plat->freq_mhz = imx8_get_cpu_rate(dev) / 1000000;
plat->mpidr = dev_read_addr(dev);
if (plat->mpidr == FDT_ADDR_T_NONE) {
printf("%s: Failed to get CPU reg property\n", __func__);