common: Drop linux/delay.h from common header

[oweals/u-boot.git] / drivers / clk / rockchip / clk_rk3328.c

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 046b4e4c2ff636947d970a60c709800e876ae10e..6d692ec8b70723c30a1c2847f771ad7dc7efedb6 100644 (file)
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:    GPL-2.0
  */
 
 #include <common.h>
@@ -9,16 +8,17 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
+#include <malloc.h>
 #include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3328.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3328.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/cru_rk3328.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/arch-rockchip/grf_rk3328.h>
 #include <asm/io.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3328-cru.h>
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <linux/delay.h>
 
 struct pll_div {
        u32 refdiv;
@@ -285,6 +285,8 @@ static void rkclk_init(struct rk3328_cru *cru)
        u32 hclk_div;
        u32 pclk_div;
 
+       rk3328_configure_cpu(cru, APLL_600_MHZ);
+
        /* configure gpll cpll */
        rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
        rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg);
@@ -792,7 +794,7 @@ static int rk3328_clk_bind(struct udevice *dev)
                sys_child->priv = priv;
        }
 
-#if CONFIG_IS_ENABLED(CONFIG_RESET_ROCKCHIP)
+#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
        ret = offsetof(struct rk3328_cru, softrst_con[0]);
        ret = rockchip_reset_bind(dev, ret, 12);
        if (ret)