mmc: fsl_esdhc: workaround for hardware 3.3v IO reliability issue

[oweals/u-boot.git] / drivers / ata / sata_ceva.c

diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c
index 047cff7f83920caa76889e9667d3c08d2b325593..77508aa5bc76f568ea19d0cd8d8a976823ee7ddc 100644 (file)
--- a/drivers/ata/sata_ceva.c
+++ b/drivers/ata/sata_ceva.c
@@ -6,8 +6,10 @@
 #include <common.h>
 #include <dm.h>
 #include <ahci.h>
+#include <log.h>
 #include <scsi.h>
 #include <asm/io.h>
+#include <linux/ioport.h>
 
 /* Vendor Specific Register Offsets */
 #define AHCI_VEND_PCFG  0xA4
@@ -81,23 +83,39 @@
 #define CEVA_TRANS_CFG 0x08000029
 #define CEVA_AXICC_CFG 0x3fffffff
 
-/* ecc addr-val pair */
-#define ECC_DIS_ADDR_CH2       0x80000000
-#define ECC_DIS_VAL_CH2        0x20140520
+/* for ls1021a */
+#define LS1021_AHCI_VEND_AXICC 0xC0
+#define LS1021_CEVA_PHY2_CFG   0x28183414
+#define LS1021_CEVA_PHY3_CFG   0x0e080e06
+#define LS1021_CEVA_PHY4_CFG   0x064a080b
+#define LS1021_CEVA_PHY5_CFG   0x2aa86470
+
+/* ecc val pair */
+#define ECC_DIS_VAL_CH1                0x00020000
+#define ECC_DIS_VAL_CH2                0x80000000
+#define ECC_DIS_VAL_CH3                0x40000000
 
 enum ceva_soc {
        CEVA_1V84,
        CEVA_LS1012A,
+       CEVA_LS1021A,
+       CEVA_LS1028A,
+       CEVA_LS1043A,
+       CEVA_LS1046A,
+       CEVA_LS1088A,
+       CEVA_LS2080A,
 };
 
 struct ceva_sata_priv {
        ulong base;
+       ulong ecc_base;
        enum ceva_soc soc;
        ulong flag;
 };
 
 static int ceva_init_sata(struct ceva_sata_priv *priv)
 {
+       ulong ecc_addr = priv->ecc_base;
        ulong base = priv->base;
        ulong tmp;
 
@@ -113,15 +131,43 @@ static int ceva_init_sata(struct ceva_sata_priv *priv)
                writel(tmp, base + AHCI_VEND_PTC);
                break;
 
+       case CEVA_LS1021A:
+               if (!ecc_addr)
+                       return -EINVAL;
+               writel(ECC_DIS_VAL_CH1, ecc_addr);
+               writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);
+               writel(LS1021_CEVA_PHY2_CFG, base + AHCI_VEND_PP2C);
+               writel(LS1021_CEVA_PHY3_CFG, base + AHCI_VEND_PP3C);
+               writel(LS1021_CEVA_PHY4_CFG, base + AHCI_VEND_PP4C);
+               writel(LS1021_CEVA_PHY5_CFG, base + AHCI_VEND_PP5C);
+               writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
+               break;
+
        case CEVA_LS1012A:
-               writel(ECC_DIS_ADDR_CH2, ECC_DIS_VAL_CH2);
+       case CEVA_LS1043A:
+       case CEVA_LS1046A:
+               if (!ecc_addr)
+                       return -EINVAL;
+               writel(ECC_DIS_VAL_CH2, ecc_addr);
+               /* fallthrough */
+       case CEVA_LS2080A:
+               writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);
+               writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
+               break;
+
+       case CEVA_LS1028A:
+       case CEVA_LS1088A:
+               if (!ecc_addr)
+                       return -EINVAL;
+               writel(ECC_DIS_VAL_CH3, ecc_addr);
                writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);
                writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
-               if (priv->flag & FLAG_COHERENT)
-                       writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC);
                break;
        }
 
+       if (priv->flag & FLAG_COHERENT)
+               writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC);
+
        return 0;
 }
 
@@ -144,12 +190,20 @@ static int sata_ceva_probe(struct udevice *dev)
 static const struct udevice_id sata_ceva_ids[] = {
        { .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 },
        { .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A },
+       { .compatible = "fsl,ls1021a-ahci", .data = CEVA_LS1021A },
+       { .compatible = "fsl,ls1028a-ahci", .data = CEVA_LS1028A },
+       { .compatible = "fsl,ls1043a-ahci", .data = CEVA_LS1043A },
+       { .compatible = "fsl,ls1046a-ahci", .data = CEVA_LS1046A },
+       { .compatible = "fsl,ls1088a-ahci", .data = CEVA_LS1088A },
+       { .compatible = "fsl,ls2080a-ahci", .data = CEVA_LS2080A },
        { }
 };
 
 static int sata_ceva_ofdata_to_platdata(struct udevice *dev)
 {
        struct ceva_sata_priv *priv = dev_get_priv(dev);
+       struct resource res_regs;
+       int ret;
 
        if (dev_read_bool(dev, "dma-coherent"))
                priv->flag |= FLAG_COHERENT;
@@ -158,8 +212,18 @@ static int sata_ceva_ofdata_to_platdata(struct udevice *dev)
        if (priv->base == FDT_ADDR_T_NONE)
                return -EINVAL;
 
+       ret = dev_read_resource_byname(dev, "ecc-addr", &res_regs);
+       if (ret)
+               priv->ecc_base = 0;
+       else
+               priv->ecc_base = res_regs.start;
+
        priv->soc = dev_get_driver_data(dev);
 
+       debug("ccsr-sata-base %lx\t ecc-base %lx\n",
+             priv->base,
+             priv->ecc_base);
+
        return 0;
 }