rename CFG_ macros to CONFIG_SYS

[oweals/u-boot.git] / cpu / i386 / sc520_asm.S

diff --git a/cpu/i386/sc520_asm.S b/cpu/i386/sc520_asm.S
index 8fc713d93bb4a55d7068a778a8dc4e550e279283..59ed2b8d654ed4062b1cb3ad93baafb4e182427c 100644 (file)
--- a/cpu/i386/sc520_asm.S
+++ b/cpu/i386/sc520_asm.S
@@ -460,21 +460,21 @@ emptybank:
        incl    %edi
        loop    cleanuplp
 
-#if defined CFG_SDRAM_DRCTMCTL
+#if defined CONFIG_SYS_SDRAM_DRCTMCTL
        /* just have your hardware desinger _GIVE_ you what you need here! */
        movl    $DRCTMCTL, %edi
-       movb    $CFG_SDRAM_DRCTMCTL,%al
+       movb    $CONFIG_SYS_SDRAM_DRCTMCTL,%al
        movb    (%edi), %al
 #else
-#if defined(CFG_SDRAM_CAS_LATENCY_2T) || defined(CFG_SDRAM_CAS_LATENCY_3T)
+#if defined(CONFIG_SYS_SDRAM_CAS_LATENCY_2T) || defined(CONFIG_SYS_SDRAM_CAS_LATENCY_3T)
        /* set the CAS latency now since it is hard to do
         * when we run from the RAM */
        movl    $DRCTMCTL, %edi          /* DRAM timing register */
        movb    (%edi), %al
-#ifdef CFG_SDRAM_CAS_LATENCY_2T
+#ifdef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
        andb    $0xef, %al
 #endif
-#ifdef CFG_SDRAM_CAS_LATENCY_3T
+#ifdef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
        orb     $0x10, %al
 #endif
        movb    %al, (%edi)
@@ -512,7 +512,7 @@ dram_done:
        shrl    $2, %eax
        movl    %eax, %ebx
 
-bank2:         movl    (%edi), %eax
+bank2: movl    (%edi), %eax
        movl    %eax, %ecx
        andl    $0x00800000, %ecx
        jz      bank1
@@ -520,7 +520,7 @@ bank2:      movl    (%edi), %eax
        shll    $6, %eax
        movl    %eax, %ebx
 
-bank1:         movl    (%edi), %eax
+bank1: movl    (%edi), %eax
        movl    %eax, %ecx
        andl    $0x00008000, %ecx
        jz      bank0
@@ -528,7 +528,7 @@ bank1:      movl    (%edi), %eax
        shll    $14, %eax
        movl    %eax, %ebx
 
-bank0:         movl    (%edi), %eax
+bank0: movl    (%edi), %eax
        movl    %eax, %ecx
        andl    $0x00000080, %ecx
        jz      done
@@ -540,7 +540,7 @@ bank0:      movl    (%edi), %eax
 done:
        movl    %ebx, %eax
 
-#if CFG_SDRAM_ECC_ENABLE
+#if CONFIG_SYS_SDRAM_ECC_ENABLE
        /* A nominal memory test: just a byte at each address line */
        movl    %eax, %ecx
        shrl    $0x1, %ecx
@@ -563,7 +563,7 @@ set_ecc:
        xorl    %eax, %eax
        shrl    $2, %ecx
        cld
-       rep     stosl
+       rep     stosl
                        /* enable read, write buffers */
        movb    $0x11, %al
        movl    $DBCTL, %edi