MIPS: add compile time definition of L2 cache size
[oweals/u-boot.git] / configs / sama5d4_xplained_nandflash_defconfig
index 14a1b140fce8d18c852f8cf504e63a4fe8c59661..efdf0a4da171c96920206c18e75079045f461e9a 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
 CONFIG_ARCH_AT91=y
 CONFIG_SYS_TEXT_BASE=0x26f00000
 CONFIG_TARGET_SAMA5D4_XPLAINED=y
@@ -8,13 +9,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xfc00c000
 CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART=y
+CONFIG_SPL_TEXT_BASE=0x200000
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=3
@@ -53,6 +55,7 @@ CONFIG_SYS_I2C_AT91=y
 CONFIG_I2C_EEPROM=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=8
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y