+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2011 The Chromium OS Authors.
* (C) Copyright 2002-2006
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <bloblist.h>
#include <console.h>
-#include <environment.h>
+#include <cpu.h>
#include <dm.h>
+#include <environment.h>
#include <fdtdec.h>
#include <fs.h>
#include <i2c.h>
#include <initcall.h>
-#include <init_helpers.h>
#include <malloc.h>
#include <mapmem.h>
#include <os.h>
#include <post.h>
#include <relocate.h>
-#include <spi.h>
+#ifdef CONFIG_SPL
+#include <spl.h>
+#endif
#include <status_led.h>
+#include <sysreset.h>
#include <timer.h>
#include <trace.h>
#include <video.h>
{
# if defined(CONFIG_HW_WATCHDOG) && \
(defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
- defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
+ defined(CONFIG_SH) || \
defined(CONFIG_DESIGNWARE_WATCHDOG) || \
defined(CONFIG_IMX_WATCHDOG))
hw_watchdog_init();
return 0;
}
+#ifdef CONFIG_SYSRESET
+static int print_resetinfo(void)
+{
+ struct udevice *dev;
+ char status[256];
+ int ret;
+
+ ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
+ if (ret) {
+ debug("%s: No sysreset device found (error: %d)\n",
+ __func__, ret);
+ /* Not all boards have sysreset drivers available during early
+ * boot, so don't fail if one can't be found.
+ */
+ return 0;
+ }
+
+ if (!sysreset_get_status(dev, status, sizeof(status)))
+ printf("%s", status);
+
+ return 0;
+}
+#endif
+
+#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
+static int print_cpuinfo(void)
+{
+ struct udevice *dev;
+ char desc[512];
+ int ret;
+
+ ret = uclass_first_device_err(UCLASS_CPU, &dev);
+ if (ret) {
+ debug("%s: Could not get CPU device (err = %d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = cpu_get_desc(dev, desc, sizeof(desc));
+ if (ret) {
+ debug("%s: Could not get CPU description (err = %d)\n",
+ dev->name, ret);
+ return ret;
+ }
+
+ printf("CPU: %s\n", desc);
+
+ return 0;
+}
+#endif
+
static int announce_dram_init(void)
{
puts("DRAM: ");
}
#endif
-#if defined(CONFIG_HARD_SPI)
-static int init_func_spi(void)
-{
- puts("SPI: ");
- spi_init();
- puts("ready\n");
- return 0;
-}
-#endif
-
static int setup_mon_len(void)
{
#if defined(__ARM__) || defined(__MICROBLAZE__)
return 0;
}
+static int setup_spl_handoff(void)
+{
+#if CONFIG_IS_ENABLED(HANDOFF)
+ gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
+ sizeof(struct spl_handoff));
+ debug("Found SPL hand-off info %p\n", gd->spl_handoff);
+#endif
+
+ return 0;
+}
+
__weak int arch_cpu_init(void)
{
return 0;
gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
#endif
#ifdef CONFIG_SYS_SDRAM_BASE
- gd->ram_top = CONFIG_SYS_SDRAM_BASE;
+ gd->ram_base = CONFIG_SYS_SDRAM_BASE;
#endif
- gd->ram_top += get_effective_memsize();
+ gd->ram_top = gd->ram_base + get_effective_memsize();
gd->ram_top = board_get_usable_ram_top(gd->mon_len);
gd->relocaddr = gd->ram_top;
debug("Ram top: %08lX\n", (ulong)gd->ram_top);
static int reserve_uboot(void)
{
- /*
- * reserve memory for U-Boot code, data & bss
- * round down to next 4 kB limit
- */
- gd->relocaddr -= gd->mon_len;
- gd->relocaddr &= ~(4096 - 1);
-#if defined(CONFIG_E500) || defined(CONFIG_MIPS)
- /* round down to next 64 kB limit so that IVPR stays aligned */
- gd->relocaddr &= ~(65536 - 1);
-#endif
-
- debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
- gd->relocaddr);
+ if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
+ /*
+ * reserve memory for U-Boot code, data & bss
+ * round down to next 4 kB limit
+ */
+ gd->relocaddr -= gd->mon_len;
+ gd->relocaddr &= ~(4096 - 1);
+ #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
+ /* round down to next 64 kB limit so that IVPR stays aligned */
+ gd->relocaddr &= ~(65536 - 1);
+ #endif
+
+ debug("Reserving %ldk for U-Boot at: %08lx\n",
+ gd->mon_len >> 10, gd->relocaddr);
+ }
gd->start_addr_sp = gd->relocaddr;
return 0;
}
-int arch_reserve_stacks(void)
+__weak int arch_reserve_stacks(void)
{
return 0;
}
return arch_reserve_stacks();
}
+static int reserve_bloblist(void)
+{
+#ifdef CONFIG_BLOBLIST
+ gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
+ gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
+#endif
+
+ return 0;
+}
+
static int display_new_sp(void)
{
debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
return 0;
}
+static int reloc_bloblist(void)
+{
+#ifdef CONFIG_BLOBLIST
+ if (gd->flags & GD_FLG_SKIP_RELOC)
+ return 0;
+ if (gd->new_bloblist) {
+ int size = CONFIG_BLOBLIST_SIZE;
+
+ debug("Copying bloblist from %p to %p, size %x\n",
+ gd->bloblist, gd->new_bloblist, size);
+ memcpy(gd->new_bloblist, gd->bloblist, size);
+ gd->bloblist = gd->new_bloblist;
+ }
+#endif
+
+ return 0;
+}
+
static int setup_reloc(void)
{
if (gd->flags & GD_FLG_SKIP_RELOC) {
initf_malloc,
log_init,
initf_bootstage, /* uses its own timer, so does not need DM */
+#ifdef CONFIG_BLOBLIST
+ bloblist_init,
+#endif
+ setup_spl_handoff,
initf_console_record,
#if defined(CONFIG_HAVE_FSP)
arch_fsp_init,
#if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
checkcpu,
#endif
+#if defined(CONFIG_SYSRESET)
+ print_resetinfo,
+#endif
#if defined(CONFIG_DISPLAY_CPUINFO)
print_cpuinfo, /* display cpu info (and speed) */
#endif
#endif
#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
init_func_vid,
-#endif
-#if defined(CONFIG_HARD_SPI)
- init_func_spi,
#endif
announce_dram_init,
dram_init, /* configure available RAM banks */
reserve_global_data,
reserve_fdt,
reserve_bootstage,
+ reserve_bloblist,
reserve_arch,
reserve_stacks,
dram_init_banksize,
INIT_FUNC_WATCHDOG_RESET
reloc_fdt,
reloc_bootstage,
+ reloc_bloblist,
setup_reloc,
#if defined(CONFIG_X86) || defined(CONFIG_ARC)
copy_uboot_to_ram,
hang();
#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
- !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
+ !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
+ !defined(CONFIG_ARC)
/* NOTREACHED - jump_to_copy() does not return */
hang();
#endif
projects / oweals / u-boot.git / blobdiff