*/
#include <common.h>
+#include <env.h>
#include <sata.h>
#include <ahci.h>
#include <scsi.h>
#include <usb.h>
#include <dwc3-uboot.h>
#include <zynqmppl.h>
-#include <i2c.h>
#include <g_dnl.h>
-DECLARE_GLOBAL_DATA_PTR;
+#include "pm_cfg_obj.h"
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
-static struct udevice *watchdog_dev;
-#endif
+DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
!defined(CONFIG_SPL_BUILD)
.id = 0x20,
.ver = 0x12c,
.name = "5cg",
+ .evexists = 1,
},
{
.id = 0x21,
.id = 0x21,
.ver = 0x12c,
.name = "4cg",
+ .evexists = 1,
},
{
.id = 0x30,
.id = 0x30,
.ver = 0x12c,
.name = "7cg",
+ .evexists = 1,
},
{
.id = 0x38,
.id = 0x62,
.name = "29dr",
},
+ {
+ .id = 0x66,
+ .name = "39dr",
+ },
};
#endif
#define ZYNQMP_VERSION_SIZE 9
#define ZYNQMP_PL_STATUS_BIT 9
+#define ZYNQMP_IPDIS_VCU_BIT 8
#define ZYNQMP_PL_STATUS_MASK BIT(ZYNQMP_PL_STATUS_BIT)
#define ZYNQMP_CSU_VERSION_MASK ~(ZYNQMP_PL_STATUS_MASK)
+#define ZYNQMP_CSU_VCUDIS_VER_MASK ZYNQMP_CSU_VERSION_MASK & \
+ ~BIT(ZYNQMP_IPDIS_VCU_BIT)
+#define MAX_VARIANTS_EV 3
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
!defined(CONFIG_SPL_BUILD)
static char *zynqmp_get_silicon_idcode_name(void)
{
- u32 i, id, ver;
+ u32 i, id, ver, j;
char *buf;
static char name[ZYNQMP_VERSION_SIZE];
ver = chip_id(IDCODE2);
for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) {
- if ((zynqmp_devices[i].id == id) &&
- (zynqmp_devices[i].ver == (ver &
- ZYNQMP_CSU_VERSION_MASK))) {
- strncat(name, "zu", 2);
- strncat(name, zynqmp_devices[i].name,
- ZYNQMP_VERSION_SIZE - 3);
- break;
+ if (zynqmp_devices[i].id == id) {
+ if (zynqmp_devices[i].evexists &&
+ !(ver & ZYNQMP_PL_STATUS_MASK))
+ break;
+ if (zynqmp_devices[i].ver == (ver &
+ ZYNQMP_CSU_VERSION_MASK))
+ break;
}
}
if (i >= ARRAY_SIZE(zynqmp_devices))
return "unknown";
- if (!zynqmp_devices[i].evexists)
+ strncat(name, "zu", 2);
+ if (!zynqmp_devices[i].evexists ||
+ (ver & ZYNQMP_PL_STATUS_MASK)) {
+ strncat(name, zynqmp_devices[i].name,
+ ZYNQMP_VERSION_SIZE - 3);
return name;
+ }
- if (ver & ZYNQMP_PL_STATUS_MASK)
- return name;
+ /*
+ * Here we are means, PL not powered up and ev variant
+ * exists. So, we need to ignore VCU disable bit(8) in
+ * version and findout if its CG or EG/EV variant.
+ */
+ for (j = 0; j < MAX_VARIANTS_EV; j++, i++) {
+ if ((zynqmp_devices[i].ver & ~BIT(ZYNQMP_IPDIS_VCU_BIT)) ==
+ (ver & ZYNQMP_CSU_VCUDIS_VER_MASK)) {
+ strncat(name, zynqmp_devices[i].name,
+ ZYNQMP_VERSION_SIZE - 3);
+ break;
+ }
+ }
+
+ if (j >= MAX_VARIANTS_EV)
+ return "unknown";
if (strstr(name, "eg") || strstr(name, "ev")) {
buf = strstr(name, "e");
{
int ret = 0;
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_CLK_ZYNQMP)
- zynqmp_pmufw_version();
+ u32 pm_api_version;
+
+ pm_api_version = zynqmp_pmufw_version();
+ printf("PMUFW:\tv%d.%d\n",
+ pm_api_version >> ZYNQMP_PM_VERSION_MAJOR_SHIFT,
+ pm_api_version & ZYNQMP_PM_VERSION_MINOR_MASK);
+
+ if (pm_api_version < ZYNQMP_PM_VERSION)
+ panic("PMUFW version error. Expected: v%d.%d\n",
+ ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR);
#endif
#if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED)
ret = psu_init();
#endif
-#if defined(CONFIG_WDT) && !defined(CONFIG_SPL_BUILD)
- /* bss is not cleared at time when watchdog_reset() is called */
- watchdog_dev = NULL;
-#endif
-
return ret;
}
int board_init(void)
{
+#if defined(CONFIG_SPL_BUILD)
+ /* Check *at build time* if the filename is an non-empty string */
+ if (sizeof(CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE) > 1)
+ zynqmp_pmufw_load_config_object(zynqmp_pm_cfg_obj,
+ zynqmp_pm_cfg_obj_size);
+#endif
+
printf("EL Level:\tEL%d\n", current_el());
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
}
#endif
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
- if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
- puts("Watchdog: Not found!\n");
- } else {
- wdt_start(watchdog_dev, 0, 0);
- puts("Watchdog: Started\n");
- }
-#endif
-
return 0;
}
-#ifdef CONFIG_WATCHDOG
-/* Called by macro WATCHDOG_RESET */
-void watchdog_reset(void)
-{
-# if !defined(CONFIG_SPL_BUILD)
- static ulong next_reset;
- ulong now;
-
- if (!watchdog_dev)
- return;
-
- now = timer_get_us();
-
- /* Do not reset the watchdog too often */
- if (now > next_reset) {
- wdt_reset(watchdog_dev);
- next_reset = now + 1000;
- }
-# endif
-}
-#endif
-
int board_early_init_r(void)
{
u32 val;
return 0;
}
-int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
-{
-#if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
- defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) && \
- defined(CONFIG_ZYNQ_EEPROM_BUS)
- i2c_set_bus_num(CONFIG_ZYNQ_EEPROM_BUS);
-
- if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
- CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
- ethaddr, 6))
- printf("I2C EEPROM MAC address read failed\n");
-#endif
-
- return 0;
-}
-
unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
char * const argv[])
{
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
{
}
+#if defined(CONFIG_BOARD_LATE_INIT)
static const struct {
u32 bit;
const char *name;
{}
};
-static u32 reset_reason(void)
+static int reset_reason(void)
{
- u32 ret;
- int i;
+ u32 reg;
+ int i, ret;
const char *reason = NULL;
- ret = readl(&crlapb_base->reset_reason);
+ ret = zynqmp_mmio_read((ulong)&crlapb_base->reset_reason, ®);
+ if (ret)
+ return -EINVAL;
puts("Reset reason:\t");
for (i = 0; i < ARRAY_SIZE(reset_reasons); i++) {
- if (ret & reset_reasons[i].bit) {
+ if (reg & reset_reasons[i].bit) {
reason = reset_reasons[i].name;
printf("%s ", reset_reasons[i].name);
break;
env_set("reset_reason", reason);
- writel(~0, &crlapb_base->reset_reason);
+ ret = zynqmp_mmio_write(~0, ~0, (ulong)&crlapb_base->reset_reason);
+ if (ret)
+ return -EINVAL;
return ret;
}
+static int set_fdtfile(void)
+{
+ char *compatible, *fdtfile;
+ const char *suffix = ".dtb";
+ const char *vendor = "xilinx/";
+
+ if (env_get("fdtfile"))
+ return 0;
+
+ compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible", NULL);
+ if (compatible) {
+ debug("Compatible: %s\n", compatible);
+
+ /* Discard vendor prefix */
+ strsep(&compatible, ",");
+
+ fdtfile = calloc(1, strlen(vendor) + strlen(compatible) +
+ strlen(suffix) + 1);
+ if (!fdtfile)
+ return -ENOMEM;
+
+ sprintf(fdtfile, "%s%s%s", vendor, compatible, suffix);
+
+ env_set("fdtfile", fdtfile);
+ free(fdtfile);
+ }
+
+ return 0;
+}
+
int board_late_init(void)
{
u32 reg = 0;
char *env_targets;
int ret;
+#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_USB_GADGET_DOWNLOAD)
+ usb_ether_init();
+#endif
+
if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
debug("Saved variables - Skipping\n");
return 0;
}
+ ret = set_fdtfile();
+ if (ret)
+ return ret;
+
ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, ®);
if (ret)
return -EINVAL;
case SD_MODE:
puts("SD_MODE\n");
if (uclass_get_device_by_name(UCLASS_MMC,
+ "mmc@ff160000", &dev) &&
+ uclass_get_device_by_name(UCLASS_MMC,
"sdhci@ff160000", &dev)) {
puts("Boot from SD0 but without SD0 enabled!\n");
return -1;
case SD_MODE1:
puts("SD_MODE1\n");
if (uclass_get_device_by_name(UCLASS_MMC,
+ "mmc@ff170000", &dev) &&
+ uclass_get_device_by_name(UCLASS_MMC,
"sdhci@ff170000", &dev)) {
puts("Boot from SD1 but without SD1 enabled!\n");
return -1;
return 0;
}
+#endif
int checkboard(void)
{
projects / oweals / u-boot.git / blobdiff