};
static struct module_pin_mux mmc1_pin_mux[] = {
+ {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
+ {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
+ {OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT5 */
+ {OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT4 */
{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
{
unsigned short val;
+#ifndef CONFIG_DM_I2C
if (i2c_probe(I2C_CPLD_ADDR))
return PROFILE_NONE;
if (i2c_read(I2C_CPLD_ADDR, CFG_REG, 1, (unsigned char *)(&val), 2))
return PROFILE_NONE;
+#else
+ struct udevice *dev = NULL;
+ int rc;
+ rc = i2c_get_chip_for_busnum(0, I2C_CPLD_ADDR, 1, &dev);
+ if (rc)
+ return PROFILE_NONE;
+ rc = dm_i2c_read(dev, CFG_REG, (unsigned char *)(&val), 2);
+ if (rc)
+ return PROFILE_NONE;
+#endif
return (1 << (val & PROFILE_MASK));
}
/* Beaglebone pinmux */
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_NOR)
configure_module_pin_mux(bone_norcape_pin_mux);
if (profile & ~PROFILE_2)
configure_module_pin_mux(i2c1_pin_mux);
/* Profiles 2 & 3 don't have NAND */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
if (profile & ~(PROFILE_2 | PROFILE_3))
configure_module_pin_mux(nand_pin_mux);
#endif
configure_module_pin_mux(rgmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux_sk_evm);
} else if (board_is_bone_lt()) {
+ if (board_is_bben()) {
+ /* SanCloud Beaglebone LT Enhanced pinmux */
+ configure_module_pin_mux(rgmii1_pin_mux);
+ } else {
+ /* Beaglebone LT pinmux */
+ configure_module_pin_mux(mii1_pin_mux);
+ }
/* Beaglebone LT pinmux */
- configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
-#if defined(CONFIG_NAND) && defined(CONFIG_EMMC_BOOT)
+#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(bone_norcape_pin_mux);