treewide: replace #include <asm/errno.h> with <linux/errno.h>

[oweals/u-boot.git] / board / solidrun / mx6cuboxi / mx6cuboxi.c

diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index fc37f1eef06da5147e5403d4272d220836c9cfbc..285588d80a3aa46e440a479e2b14c7eb440af763 100644 (file)
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -19,7 +19,7 @@
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/mxc_hdmi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
 #include <asm/imx-common/video.h>
@@ -33,7 +33,7 @@
 #include <asm/arch/sys_proto.h>
 #include <spl.h>
 #include <usb.h>
-#include <usb/ehci-fsl.h>
+#include <usb/ehci-ci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -143,8 +143,9 @@ static void setup_iomux_enet(void)
        SETUP_IOMUX_PADS(enet_pads);
 
        gpio_direction_output(ETH_PHY_RESET, 0);
-       mdelay(2);
+       mdelay(10);
        gpio_set_value(ETH_PHY_RESET, 1);
+       udelay(100);
 }
 
 int board_phy_config(struct phy_device *phydev)
@@ -366,14 +367,6 @@ int checkboard(void)
        return 0;
 }
 
-static bool is_mx6q(void)
-{
-       if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
-               return true;
-       else
-               return false;
-}
-
 int board_late_init(void)
 {
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
@@ -382,7 +375,7 @@ int board_late_init(void)
        else
                setenv("board_name", "CUBOXI");
 
-       if (is_mx6q())
+       if (is_mx6dq())
                setenv("board_rev", "MX6Q");
        else
                setenv("board_rev", "MX6DL");
@@ -594,10 +587,6 @@ static void gpr_init(void)
        writel(0x007F007F, &iomux->gpr[7]);
 }
 
-/*
- * This section requires the differentiation between Solidrun mx6 boards, but
- * for now, it will configure only for the mx6dual hummingboard version.
- */
 static void spl_dram_init(int width)
 {
        struct mx6_ddr_sysinfo sysinfo = {
@@ -616,9 +605,11 @@ static void spl_dram_init(int width)
                .sde_to_rst = 0x10,     /* 14 cycles, 200us (JEDEC default) */
                .rst_to_cke = 0x23,     /* 33 cycles, 500us (JEDEC default) */
                .ddr_type = DDR_TYPE_DDR3,
+               .refsel = 1,    /* Refresh cycles at 32KHz */
+               .refr = 7,      /* 8 refresh commands per refresh cycle */
        };
 
-       if (is_cpu_type(MXC_CPU_MX6D) || is_cpu_type(MXC_CPU_MX6Q))
+       if (is_mx6dq())
                mx6dq_dram_iocfg(width, &mx6q_ddr_ioregs, &mx6q_grp_ioregs);
        else
                mx6sdl_dram_iocfg(width, &mx6dl_ddr_ioregs, &mx6sdl_grp_ioregs);