common: Drop linux/delay.h from common header

[oweals/u-boot.git] / board / freescale / t102xqds / ddr.c

diff --git a/board/freescale/t102xqds/ddr.c b/board/freescale/t102xqds/ddr.c
index 912d6a950f8c4653e222797c599f2e8b91a54020..c27cecd5aafe2604c546429c445ced62b38260b0 100644 (file)
--- a/board/freescale/t102xqds/ddr.c
+++ b/board/freescale/t102xqds/ddr.c
@@ -1,17 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 #include <asm/mpc85xx_gpio.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -139,6 +141,9 @@ found:
 #else
        popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
        popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+
+       /* optimize cpo for erratum A-009942 */
+       popts->cpo_sample = 0x5f;
 #endif
 
        /* T1023 supports max DDR bus 32bit width, T1024 supports DDR 64bit,
@@ -166,24 +171,25 @@ void board_mem_sleep_setup(void)
 }
 #endif
 
-phys_size_t initdram(int board_type)
+int dram_init(void)
 {
        phys_size_t dram_size;
 
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL)
        puts("Initializing....using SPD\n");
-
        dram_size = fsl_ddr_sdram();
-       dram_size = setup_ddr_tlbs(dram_size / 0x100000);
-       dram_size *= 0x100000;
 #else
        /* DDR has been initialised by first stage boot loader */
        dram_size =  fsl_ddr_sdram_size();
 #endif
+       dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+       dram_size *= 0x100000;
 
 #if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
        fsl_dp_resume();
 #endif
 
-       return dram_size;
+       gd->ram_size = dram_size;
+
+       return 0;
 }