Merge tag 'ti-v2020.07-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

[oweals/u-boot.git] / board / freescale / mpc8315erdb / mpc8315erdb.c

diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c
index f80b0ba4a59649feab8acf228d4814be45ed3f06..aa2e7fe206adcb7c1b139eeb924dcc100fb0d054 100644 (file)
--- a/board/freescale/mpc8315erdb/mpc8315erdb.c
+++ b/board/freescale/mpc8315erdb/mpc8315erdb.c
@@ -1,36 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2007 Freescale Semiconductor, Inc.
  *
  * Author: Scott Wood <scottwood@freescale.com>
  *         Dave Liu <daveliu@freescale.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
  */
 
 #include <common.h>
+#include <hwconfig.h>
 #include <i2c.h>
-#include <libfdt.h>
+#include <init.h>
+#include <net.h>
+#include <linux/delay.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
 #include <netdev.h>
 #include <asm/io.h>
+#include <ns16550.h>
+#include <nand.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -44,6 +33,8 @@ int board_early_init_f(void)
        return 0;
 }
 
+#ifndef CONFIG_NAND_SPL
+
 static u8 read_board_info(void)
 {
        u8 val8;
@@ -135,7 +126,6 @@ void pci_init_board(void)
        volatile law83xx_t *pcie_law = sysconf->pcielaw;
        struct pci_region *reg[] = { pci_regions };
        struct pci_region *pcie_reg[] = { pcie_regions_0, pcie_regions_1, };
-       int warmboot;
 
        /* Enable all 3 PCI_CLK_OUTPUTs. */
        clk->occr |= 0xe0000000;
@@ -149,10 +139,7 @@ void pci_init_board(void)
        pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
 
-       warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
-       warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF;
-
-       mpc83xx_pci_init(1, reg, warmboot);
+       mpc83xx_pci_init(1, reg);
 
        /* Configure the clock for PCIE controller */
        clrsetbits_be32(&clk->sccr, SCCR_PCIEXP1CM | SCCR_PCIEXP2CM,
@@ -170,26 +157,21 @@ void pci_init_board(void)
        out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR);
        out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB);
 
-       mpc83xx_pcie_init(2, pcie_reg, warmboot);
+       mpc83xx_pcie_init(2, pcie_reg);
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 void fdt_tsec1_fixup(void *fdt, bd_t *bd)
 {
-       char *mpc8315erdb = getenv("mpc8315erdb");
        const char disabled[] = "disabled";
        const char *path;
        int ret;
 
-       if (!mpc8315erdb)
-               return;
-
-       if (!strcmp(mpc8315erdb, "tsec1")) {
+       if (hwconfig_arg_cmp("board_type", "tsec1")) {
                return;
-       } else if (strcmp(mpc8315erdb, "ulpi")) {
-               printf("WARNING: wrong `mpc8315erdb' environment "
-                      "variable specified: `%s'. Should be `ulpi' "
-                      "or `tsec1'.\n", mpc8315erdb);
+       } else if (!hwconfig_arg_cmp("board_type", "ulpi")) {
+               printf("NOTICE: No or unknown board_type hwconfig specified.\n"
+                      "        Assuming board with TSEC1.\n");
                return;
        }
 
@@ -208,14 +190,16 @@ void fdt_tsec1_fixup(void *fdt, bd_t *bd)
        do_fixup_by_path(fdt, path, "status", disabled, sizeof(disabled), 1);
 }
 
-void ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, bd_t *bd)
 {
        ft_cpu_setup(blob, bd);
 #ifdef CONFIG_PCI
        ft_pci_setup(blob, bd);
 #endif
-       fdt_fixup_dr_usb(blob, bd);
+       fsl_fdt_fixup_dr_usb(blob, bd);
        fdt_tsec1_fixup(blob, bd);
+
+       return 0;
 }
 #endif
 
@@ -224,3 +208,41 @@ int board_eth_init(bd_t *bis)
        cpu_eth_init(bis);      /* Initialize TSECs first */
        return pci_eth_init(bis);
 }
+
+#else /* CONFIG_NAND_SPL */
+
+int checkboard(void)
+{
+       puts("Board: Freescale MPC8315ERDB\n");
+       return 0;
+}
+
+void board_init_f(ulong bootflag)
+{
+       board_early_init_f();
+       NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
+                    CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
+       puts("NAND boot... ");
+       timer_init();
+       dram_init();
+       relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000, (gd_t *)gd,
+                     CONFIG_SYS_NAND_U_BOOT_RELOC);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+       nand_boot();
+}
+
+void putc(char c)
+{
+       if (gd->flags & GD_FLG_SILENT)
+               return;
+
+       if (c == '\n')
+               NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), '\r');
+
+       NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), c);
+}
+
+#endif /* CONFIG_NAND_SPL */