command: Remove the cmd_tbl_t typedef

[oweals/u-boot.git] / board / freescale / imx8mm_evk / imx8mm_evk.c

diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c
index e4742338e33068ebf2aaacb36280f5a4f0cacbb2..c43af9bc484e3a0b9101a7344db17c89402ff095 100644 (file)
--- a/board/freescale/imx8mm_evk/imx8mm_evk.c
+++ b/board/freescale/imx8mm_evk/imx8mm_evk.c
@@ -4,18 +4,62 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <init.h>
+#include <miiphy.h>
+#include <netdev.h>
+
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init(void)
 {
-       gd->ram_size = PHYS_SDRAM_SIZE;
+       /* rom_pointer[1] contains the size of TEE occupies */
+       if (rom_pointer[1])
+               gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
+       else
+               gd->ram_size = PHYS_SDRAM_SIZE;
+
+       return 0;
+}
+
+#if IS_ENABLED(CONFIG_FEC_MXC)
+static int setup_fec(void)
+{
+       struct iomuxc_gpr_base_regs *gpr =
+               (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+       /* Use 125M anatop REF_CLK1 for ENET1, not from external */
+       clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
 
        return 0;
 }
 
+int board_phy_config(struct phy_device *phydev)
+{
+       /* enable rgmii rxc skew and phy mode select to RGMII copper */
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
+
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+
+       if (phydev->drv->config)
+               phydev->drv->config(phydev);
+       return 0;
+}
+#endif
+
 int board_init(void)
 {
+       if (IS_ENABLED(CONFIG_FEC_MXC))
+               setup_fec();
+
        return 0;
 }